t_divider.tdo

本人编写的定点除法器,开发软件为XILINX的ISE6.2,通过PAR仿真.

## NOTE: Do not edit this file.
## Auto generated by Project Navigator for VHDL Post-PAR Simulation
##
vlib work
## Compile Post-PAR Model for Module devider
vcom -87 -explicit  devider_timesim.vhd
vcom -93 -explicit  t_divider.timesim_vhw
vsim -t 1ps -sdfmax /UUT=devider_timesim.sdf  -lib work t_divider
do t_divider.udo
view wave
add wave *
view structure
view signals
run -all
## End