lcd.map.eqn

用Verilog HDL 语言写的在LCD液晶上显示文字的源程序

A1L284Q = xpage[6];


--A1L1 is LessThan~182
--operation mode is normal

A1L1 = !xpage[6] & (!xpage[4] # !xpage[2] # !xpage[3]);

--A1L6 is LessThan~187
--operation mode is normal

A1L6 = !xpage[6] & (!xpage[4] # !xpage[2] # !xpage[3]);


--xpage[1] is xpage[1]
--operation mode is normal

xpage[1]_lut_out = A1L094 # xpage[1] & rst & !A1L563;
xpage[1] = DFFEA(xpage[1]_lut_out, !A1L263Q, , , , , );

--A1L274Q is xpage[1]~1995
--operation mode is normal

A1L274Q = xpage[1];


--xpage[0] is xpage[0]
--operation mode is normal

xpage[0]_lut_out = A1L194 # xpage[0] & rst & !A1L563;
xpage[0] = DFFEA(xpage[0]_lut_out, !A1L263Q, , , , , );

--A1L074Q is xpage[0]~1996
--operation mode is normal

A1L074Q = xpage[0];


--A1L2 is LessThan~183
--operation mode is normal

A1L2 = !xpage[6] & (!xpage[5] # !xpage[0] # !xpage[1]);

--A1L7 is LessThan~188
--operation mode is normal

A1L7 = !xpage[6] & (!xpage[5] # !xpage[0] # !xpage[1]);


--A1L714 is state~1867
--operation mode is normal

A1L714 = state.s4 & xpage[7] & !A1L1 & !A1L2;

--A1L634 is state~1920
--operation mode is normal

A1L634 = state.s4 & xpage[7] & !A1L1 & !A1L2;


--A1L3 is LessThan~184
--operation mode is normal

A1L3 = A1L1 # A1L2 # !xpage[7];

--A1L8 is LessThan~189
--operation mode is normal

A1L8 = A1L1 # A1L2 # !xpage[7];


--A1L46 is Select~3482
--operation mode is normal

A1L46 = state.s8 & addr1[6] & (!A1L3);

--A1L49 is Select~3524
--operation mode is normal

A1L49 = state.s8 & addr1[6] & (!A1L3);


--addr[0] is addr[0]
--operation mode is normal

addr[0]_lut_out = A1L97;
addr[0] = DFFEA(addr[0]_lut_out, !A1L263Q, , , rst, , );

--A1L241Q is addr[0]~321
--operation mode is normal

A1L241Q = addr[0];


--addr[6] is addr[6]
--operation mode is normal

addr[6]_lut_out = A1L28;
addr[6] = DFFEA(addr[6]_lut_out, !A1L263Q, , , rst, , );

--A1L451Q is addr[6]~322
--operation mode is normal

A1L451Q = addr[6];


--addr[5] is addr[5]
--operation mode is normal

addr[5]_lut_out = addr[5] & !A1L663 # !A1L29;
addr[5] = DFFEA(addr[5]_lut_out, !A1L263Q, , , rst, , );

--A1L251Q is addr[5]~323
--operation mode is normal

A1L251Q = addr[5];


--A1L4 is LessThan~185
--operation mode is normal

A1L4 = !addr[6] & !addr[5];

--A1L9 is LessThan~190
--operation mode is normal

A1L9 = !addr[6] & !addr[5];


--A1L814 is state~1868
--operation mode is normal

A1L814 = rst & (state.s17 # state.s18 & A1L4);

--A1L734 is state~1921
--operation mode is normal

A1L734 = rst & (state.s17 # state.s18 & A1L4);


--A1L914 is state~1870
--operation mode is normal

A1L914 = rst & state.s12 # !rst & (state.s13 & !A1L614);

--A1L834 is state~1922
--operation mode is normal

A1L834 = rst & state.s12 # !rst & (state.s13 & !A1L614);


--A1L5 is LessThan~186
--operation mode is normal

A1L5 = addr[4] # addr[6] # addr[5];

--A1L01 is LessThan~191
--operation mode is normal

A1L01 = addr[4] # addr[6] # addr[5];


--A1L024 is state~1872
--operation mode is normal

A1L024 = rst & (state.s15 # A1L4 & state.s16);

--A1L934 is state~1923
--operation mode is normal

A1L934 = rst & (state.s15 # A1L4 & state.s16);


--A1L124 is state~1874
--operation mode is normal

A1L124 = rst & state.s10 # !rst & (state.s11 & !A1L614);

--A1L044 is state~1924
--operation mode is normal

A1L044 = rst & state.s10 # !rst & (state.s11 & !A1L614);


--A1L224 is state~1878
--operation mode is normal

A1L224 = state.s9 & !rst & (A1L761Q $ !A1L471Q);

--A1L144 is state~1925
--operation mode is normal

A1L144 = state.s9 & !rst & (A1L761Q $ !A1L471Q);


--A1L324 is state~1880
--operation mode is normal

A1L324 = state.s13 & rst & A1L5;

--A1L244 is state~1926
--operation mode is normal

A1L244 = state.s13 & rst & A1L5;


--A1L424 is state~1882
--operation mode is normal

A1L424 = state.s18 & rst & (addr[6] # addr[5]);

--A1L344 is state~1927
--operation mode is normal

A1L344 = state.s18 & rst & (addr[6] # addr[5]);


--A1L524 is state~1886
--operation mode is normal

A1L524 = state.s16 & rst & (addr[6] # addr[5]);

--A1L444 is state~1928
--operation mode is normal

A1L444 = state.s16 & rst & (addr[6] # addr[5]);


--A1L624 is state~1888
--operation mode is normal

A1L624 = A1L5 & state.s11 & rst;

--A1L544 is state~1929
--operation mode is normal

A1L544 = A1L5 & state.s11 & rst;


--state.s7 is state.s7
--operation mode is normal

state.s7_lut_out = rst & state.s6 # !rst & (state.s7 & !A1L614);
state.s7 = DFFEA(state.s7_lut_out, !A1L263Q, , , , , );

--A1L393Q is state.s7~19
--operation mode is normal

A1L393Q = state.s7;


--A1L724 is state~1890
--operation mode is normal

A1L724 = state.s7 # state.s8 & (!addr1[6]);

--A1L644 is state~1930
--operation mode is normal

A1L644 = state.s7 # state.s8 & (!addr1[6]);


--state.s3 is state.s3
--operation mode is normal

state.s3_lut_out = rst & state.s2 # !rst & (state.s3 & !A1L614);
state.s3 = DFFEA(state.s3_lut_out, !A1L263Q, , , , , );

--A1L583Q is state.s3~19
--operation mode is normal

A1L583Q = state.s3;


--A1L824 is state~1892
--operation mode is normal

A1L824 = state.s3 # state.s4 & (!addr1[6]);

--A1L744 is state~1931
--operation mode is normal

A1L744 = state.s3 # state.s4 & (!addr1[6]);


--A1L584 is xpage~1953
--operation mode is normal

A1L584 = C3_unreg_res_node[7] # !state.s8 & !state.s4 # !A1L3;

--A1L894 is xpage~1997
--operation mode is normal

A1L894 = C3_unreg_res_node[7] # !state.s8 & !state.s4 # !A1L3;


--A1L563 is reduce_or~96
--operation mode is normal

A1L563 = state.s5 # state.s1 # state.s8 # state.s4;

--A1L963 is reduce_or~100
--operation mode is normal

A1L963 = state.s5 # state.s1 # state.s8 # state.s4;


--A1L684 is xpage~1955
--operation mode is normal

A1L684 = rst & (state.s8 # state.s4);

--A1L994 is xpage~1998
--operation mode is normal

A1L994 = rst & (state.s8 # state.s4);


--E9_cs_buffer[2] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

E9_cs_buffer[2] = xpage[2] $ (E9_cout[1]);

--E9L51 is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~101
--operation mode is arithmetic

E9L51 = xpage[2] $ (E9_cout[1]);

--E9_cout[2] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

E9_cout[2] = CARRY(xpage[2] & (E9_cout[1]));


--A1L784 is xpage~1956
--operation mode is normal

A1L784 = A1L684 & (A1L3 & E9_cs_buffer[2] # !A1L3 & (xpage[2]));

--A1L005 is xpage~1999
--operation mode is normal

A1L005 = A1L684 & (A1L3 & E9_cs_buffer[2] # !A1L3 & (xpage[2]));


--E9_cs_buffer[6] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]
--operation mode is arithmetic

E9_cs_buffer[6] = xpage[6] $ (E9_cout[5]);

--E9L32 is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[6]~102
--operation mode is arithmetic

E9L32 = xpage[6] $ (E9_cout[5]);

--E9_cout[6] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[6]
--operation mode is arithmetic

E9_cout[6] = CARRY(xpage[6] & (E9_cout[5]));


--A1L884 is xpage~1958
--operation mode is normal

A1L884 = A1L3 & (E9_cs_buffer[6] # xpage[6] & xpage[7]) # !A1L3 & xpage[6] & xpage[7];

--A1L105 is xpage~2000
--operation mode is normal

A1L105 = A1L3 & (E9_cs_buffer[6] # xpage[6] & xpage[7]) # !A1L3 & xpage[6] & xpage[7];


--A1L984 is xpage~1959
--operation mode is normal

A1L984 = rst & (!A1L563);

--A1L205 is xpage~2001
--operation mode is normal

A1L205 = rst & (!A1L563);


--E9_cs_buffer[1] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

E9_cs_buffer[1] = xpage[1] $ (E9_cout[0]);

--E9L31 is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~103
--operation mode is arithmetic

E9L31 = xpage[1] $ (E9_cout[0]);

--E9_cout[1] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

E9_cout[1] = CARRY(xpage[1] & (E9_cout[0]));


--A1L094 is xpage~1961
--operation mode is normal

A1L094 = A1L684 & (A1L3 & E9_cs_buffer[1] # !A1L3 & (xpage[1]));

--A1L305 is xpage~2002
--operation mode is normal

A1L305 = A1L684 & (A1L3 & E9_cs_buffer[1] # !A1L3 & (xpage[1]));


--E9_cs_buffer[0] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]
--operation mode is arithmetic

E9_cs_buffer[0] = xpage[0] $ addr1[6];

--E9L11 is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cs_buffer[0]~104
--operation mode is arithmetic

E9L11 = xpage[0] $ addr1[6];

--E9_cout[0] is lpm_add_sub:add_rtl_2|addcore:adder|a_csnbuffer:result_node|cout[0]
--operation mode is arithmetic

E9_cout[0] = CARRY(xpage[0] & addr1[6]);


--A1L194 is xpage~1963
--operation mode is normal

A1L194 = A1L684 & (A1L3 & E9_cs_buffer[0] # !A1L3 & (xpage[0]));

--A1L405 is xpage~2003
--operation mode is normal

A1L405 = A1L684 & (A1L3 & E9_cs_buffer[0] # !A1L3 & (xpage[0]));


--E3_cs_buffer[2] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]
--operation mode is arithmetic

E3_cs_buffer[2] = addr[2] $ (E3_cout[1]);

--E3L11 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[2]~68
--operation mode is arithmetic

E3L11 = addr[2] $ (E3_cout[1]);

--E3_cout[2] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[2]
--operation mode is arithmetic

E3_cout[2] = CARRY(addr[2] & (E3_cout[1]));


--A1L56 is Select~3484
--operation mode is normal

A1L56 = !state.s13 & !state.s11;

--A1L59 is Select~3525
--operation mode is normal

A1L59 = !state.s13 & !state.s11;


--A1L66 is Select~3485
--operation mode is normal

A1L66 = !A1L56 & (A1L5 & addr[2] # !A1L5 & (E3_cs_buffer[2]));

--A1L69 is Select~3526
--operation mode is normal

A1L69 = !A1L56 & (A1L5 & addr[2] # !A1L5 & (E3_cs_buffer[2]));


--A1L76 is Select~3486
--operation mode is normal

A1L76 = !state.s18 & !state.s16;

--A1L79 is Select~3527
--operation mode is normal

A1L79 = !state.s18 & !state.s16;


--A1L86 is Select~3487
--operation mode is normal

A1L86 = !A1L76 & (A1L4 & E3_cs_buffer[2] # !A1L4 & (addr[2]));

--A1L89 is Select~3528
--operation mode is normal

A1L89 = !A1L76 & (A1L4 & E3_cs_buffer[2] # !A1L4 & (addr[2]));


--A1L663 is reduce_or~97
--operation mode is normal

A1L663 = !A1L463 # !A1L363;

--A1L073 is reduce_or~101
--operation mode is normal

A1L073 = !A1L463 # !A1L363;


--A1L96 is Select~3488
--operation mode is normal

A1L96 = A1L66 # A1L86 # addr[2] & !A1L663;

--A1L99 is Select~3529
--operation mode is normal

A1L99 = A1L66 # A1L86 # addr[2] & !A1L663;


--E3_cs_buffer[3] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]
--operation mode is arithmetic

E3_cs_buffer[3] = addr[3] $ (E3_cout[2]);

--E3L31 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[3]~69
--operation mode is arithmetic

E3L31 = addr[3] $ (E3_cout[2]);

--E3_cout[3] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[3]
--operation mode is arithmetic

E3_cout[3] = CARRY(addr[3] & (E3_cout[2]));


--A1L07 is Select~3493
--operation mode is normal

A1L07 = !A1L56 & (A1L5 & addr[3] # !A1L5 & (E3_cs_buffer[3]));

--A1L001 is Select~3530
--operation mode is normal

A1L001 = !A1L56 & (A1L5 & addr[3] # !A1L5 & (E3_cs_buffer[3]));


--A1L17 is Select~3494
--operation mode is normal

A1L17 = !A1L76 & (A1L4 & E3_cs_buffer[3] # !A1L4 & (addr[3]));

--A1L101 is Select~3531
--operation mode is normal

A1L101 = !A1L76 & (A1L4 & E3_cs_buffer[3] # !A1L4 & (addr[3]));


--A1L27 is Select~3495
--operation mode is normal

A1L27 = A1L07 # A1L17 # addr[3] & !A1L663;

--A1L201 is Select~3532
--operation mode is normal

A1L201 = A1L07 # A1L17 # addr[3] & !A1L663;


--E3_cs_buffer[1] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]
--operation mode is arithmetic

E3_cs_buffer[1] = addr[1] $ addr[0];

--E3L9 is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cs_buffer[1]~70
--operation mode is arithmetic

E3L9 = addr[1] $ addr[0];

--E3_cout[1] is lpm_add_sub:add_rtl_0|addcore:adder|a_csnbuffer:result_node|cout[1]
--operation mode is arithmetic

E3_cout[1] = CARRY(addr[1] & addr[0]);


--A1L37 is Select~3496
--operation mode is normal

A1L37 = !A1L56 & (A1L5 & addr[1] # !A1L5 & (E3_cs_buffer[1]));