lcd.map.eqn

用Verilog HDL 语言写的在LCD液晶上显示文字的源程序

-- Copyright (C) 1991-2005 Altera Corporation
-- Your use of Altera Corporation's design tools, logic functions 
-- and other software and tools, and its AMPP partner logic 
-- functions, and any output files any of the foregoing 
-- (including device programming or simulation files), and any 
-- associated documentation or information are expressly subject 
-- to the terms and conditions of the Altera Program License 
-- Subscription Agreement, Altera MegaCore Function License 
-- Agreement, or other applicable license agreement, including, 
-- without limitation, that your use is for the sole purpose of 
-- programming logic devices manufactured by Altera and sold by 
-- Altera or its authorized distributors.  Please refer to the 
-- applicable agreement for further details.
--A1L871Q is data[0]~reg0
--operation mode is normal

A1L871Q_lut_out = A1L102 & (A1L302 # A1L502) # !A1L562;
A1L871Q = DFFEA(A1L871Q_lut_out, !A1L263Q, , , , , );

--A1L771Q is data[0]~4582
--operation mode is normal

A1L771Q = A1L871Q;


--A1L181Q is data[1]~reg0
--operation mode is normal

A1L181Q_lut_out = !A1L662;
A1L181Q = DFFEA(A1L181Q_lut_out, !A1L263Q, , , , , );

--A1L081Q is data[1]~4583
--operation mode is normal

A1L081Q = A1L181Q;


--A1L481Q is data[2]~reg0
--operation mode is normal

A1L481Q_lut_out = !A1L762;
A1L481Q = DFFEA(A1L481Q_lut_out, !A1L263Q, , , , , );

--A1L381Q is data[2]~4584
--operation mode is normal

A1L381Q = A1L481Q;


--A1L781Q is data[3]~reg0
--operation mode is normal

A1L781Q_lut_out = A1L212 # A1L612 # A1L781Q & !state.s19;
A1L781Q = DFFEA(A1L781Q_lut_out, !A1L263Q, , , , , );

--A1L681Q is data[3]~4585
--operation mode is normal

A1L681Q = A1L781Q;


--A1L091Q is data[4]~reg0
--operation mode is normal

A1L091Q_lut_out = A1L022 # rst & (A1L222 # !A1L363);
A1L091Q = DFFEA(A1L091Q_lut_out, !A1L263Q, , , , , );

--A1L981Q is data[4]~4586
--operation mode is normal

A1L981Q = A1L091Q;


--A1L391Q is data[5]~reg0
--operation mode is normal

A1L391Q_lut_out = A1L322 # A1L422 # A1L522 # !A1L962;
A1L391Q = DFFEA(A1L391Q_lut_out, !A1L263Q, , , , , );

--A1L291Q is data[5]~4587
--operation mode is normal

A1L291Q = A1L391Q;


--A1L691Q is data[6]~reg0
--operation mode is normal

A1L691Q_lut_out = A1L032 # A1L632 # rst & !A1L072;
A1L691Q = DFFEA(A1L691Q_lut_out, !A1L263Q, , , , , );

--A1L591Q is data[6]~4588
--operation mode is normal

A1L591Q = A1L691Q;


--A1L991Q is data[7]~reg0
--operation mode is normal

A1L991Q_lut_out = !A1L172;
A1L991Q = DFFEA(A1L991Q_lut_out, !A1L263Q, , , , , );

--A1L891Q is data[7]~4589
--operation mode is normal

A1L891Q = A1L991Q;


--A1L673Q is rs~reg0
--operation mode is normal

A1L673Q_lut_out = rst & A1L373 # !rst & (A1L673Q & !A1L614);
A1L673Q = DFFEA(A1L673Q_lut_out, !A1L263Q, , , , , );

--A1L473Q is rs~149
--operation mode is normal

A1L473Q = A1L673Q;


--A1L263Q is en~reg0
--operation mode is normal

A1L263Q_lut_out = count[0] # !count[1] # !count[2];
A1L263Q = DFFEA(A1L263Q_lut_out, clk, , , , , );

--A1L163Q is en~0
--operation mode is normal

A1L163Q = A1L263Q;


--A1L761Q is cs1~reg0
--operation mode is normal

A1L761Q_lut_out = rst & A1L461 # !rst & (A1L471Q # !A1L761Q);
A1L761Q = DFFEA(A1L761Q_lut_out, !A1L263Q, , , , , );

--A1L561Q is cs1~77
--operation mode is normal

A1L561Q = A1L761Q;


--A1L471Q is cs2~reg0
--operation mode is normal

A1L471Q_lut_out = A1L071 # rst & A1L471Q & A1L961;
A1L471Q = DFFEA(A1L471Q_lut_out, !A1L263Q, , , , , );

--A1L171Q is cs2~37
--operation mode is normal

A1L171Q = A1L471Q;


--A1L064Q is test[0]~reg0
--operation mode is normal

A1L064Q_lut_out = A1L064Q $ (addr1[6] & A1L714) # !rst;
A1L064Q = DFFEA(A1L064Q_lut_out, !A1L263Q, , , , , );

--A1L954Q is test[0]~267
--operation mode is normal

A1L954Q = A1L064Q;


--A1L364Q is test[1]~reg0
--operation mode is normal

A1L364Q_lut_out = A1L364Q $ A1L46 # !rst;
A1L364Q = DFFEA(A1L364Q_lut_out, !A1L263Q, , , , , );

--A1L264Q is test[1]~268
--operation mode is normal

A1L264Q = A1L364Q;


--A1L764Q is test[3]~reg0
--operation mode is normal

A1L764Q_lut_out = rst & (state.s15 # A1L764Q & !state.s16);
A1L764Q = DFFEA(A1L764Q_lut_out, !A1L263Q, , , , , );

--A1L664Q is test[3]~269
--operation mode is normal

A1L664Q = A1L764Q;


--addr[2] is addr[2]
--operation mode is normal

addr[2]_lut_out = A1L96;
addr[2] = DFFEA(addr[2]_lut_out, !A1L263Q, , , rst, , );

--A1L641Q is addr[2]~317
--operation mode is normal

A1L641Q = addr[2];


--A1L102 is data~4440
--operation mode is normal

A1L102 = addr[2] & rst;

--A1L572 is data~4590
--operation mode is normal

A1L572 = addr[2] & rst;


--state.s18 is state.s18
--operation mode is normal

state.s18_lut_out = A1L814 # state.s18 & !rst & !A1L614;
state.s18 = DFFEA(state.s18_lut_out, !A1L263Q, , , , , );

--A1L314Q is state.s18~54
--operation mode is normal

A1L314Q = state.s18;


--state.s13 is state.s13
--operation mode is normal

state.s13_lut_out = A1L914 # state.s13 & rst & !A1L5;
state.s13 = DFFEA(state.s13_lut_out, !A1L263Q, , , , , );

--A1L504Q is state.s13~56
--operation mode is normal

A1L504Q = state.s13;


--addr[4] is addr[4]
--operation mode is normal

addr[4]_lut_out = addr[4] & !A1L663 # !A1L19;
addr[4] = DFFEA(addr[4]_lut_out, !A1L263Q, , , rst, , );

--A1L051Q is addr[4]~318
--operation mode is normal

A1L051Q = addr[4];


--A1L202 is data~4441
--operation mode is normal

A1L202 = addr[4] & state.s18 # !addr[4] & (state.s13);

--A1L672 is data~4591
--operation mode is normal

A1L672 = addr[4] & state.s18 # !addr[4] & (state.s13);


--addr[3] is addr[3]
--operation mode is normal

addr[3]_lut_out = A1L27;
addr[3] = DFFEA(addr[3]_lut_out, !A1L263Q, , , rst, , );

--A1L841Q is addr[3]~319
--operation mode is normal

A1L841Q = addr[3];


--addr[1] is addr[1]
--operation mode is normal

addr[1]_lut_out = A1L57;
addr[1] = DFFEA(addr[1]_lut_out, !A1L263Q, , , rst, , );

--A1L441Q is addr[1]~320
--operation mode is normal

A1L441Q = addr[1];


--A1L302 is data~4442
--operation mode is normal

A1L302 = addr[0] & A1L202 & addr[3] & !addr[1];

--A1L772 is data~4592
--operation mode is normal

A1L772 = addr[0] & A1L202 & addr[3] & !addr[1];


--state.s16 is state.s16
--operation mode is normal

state.s16_lut_out = A1L024 # state.s16 & !rst & !A1L614;
state.s16 = DFFEA(state.s16_lut_out, !A1L263Q, , , , , );

--A1L904Q is state.s16~42
--operation mode is normal

A1L904Q = state.s16;


--state.s11 is state.s11
--operation mode is normal

state.s11_lut_out = A1L124 # state.s11 & rst & !A1L5;
state.s11 = DFFEA(state.s11_lut_out, !A1L263Q, , , , , );

--A1L104Q is state.s11~44
--operation mode is normal

A1L104Q = state.s11;


--A1L402 is data~4443
--operation mode is normal

A1L402 = addr[4] & state.s16 # !addr[4] & (state.s11);

--A1L872 is data~4593
--operation mode is normal

A1L872 = addr[4] & state.s16 # !addr[4] & (state.s11);


--A1L502 is data~4444
--operation mode is normal

A1L502 = A1L402 & addr[1] & !addr[3] & !addr[0];

--A1L972 is data~4594
--operation mode is normal

A1L972 = A1L402 & addr[1] & !addr[3] & !addr[0];


--A1L602 is data~4449
--operation mode is normal

A1L602 = addr[3] & rst & (state.s18 # state.s13);

--A1L082 is data~4595
--operation mode is normal

A1L082 = addr[3] & rst & (state.s18 # state.s13);


--A1L702 is data~4450
--operation mode is normal

A1L702 = A1L602 & (!addr[2] # !addr[1]);

--A1L182 is data~4596
--operation mode is normal

A1L182 = A1L602 & (!addr[2] # !addr[1]);


--xpage[3] is xpage[3]
--operation mode is normal

xpage[3]_lut_out = !A1L594;
xpage[3] = DFFEA(xpage[3]_lut_out, !A1L263Q, , , , , );

--A1L674Q is xpage[3]~1989
--operation mode is normal

A1L674Q = xpage[3];


--state.s6 is state.s6
--operation mode is normal

state.s6_lut_out = !A1L234;
state.s6 = DFFEA(state.s6_lut_out, !A1L263Q, , , , , );

--A1L193Q is state.s6~22
--operation mode is normal

A1L193Q = state.s6;


--state.s2 is state.s2
--operation mode is normal

state.s2_lut_out = !A1L334;
state.s2 = DFFEA(state.s2_lut_out, !A1L263Q, , , , , );

--A1L383Q is state.s2~22
--operation mode is normal

A1L383Q = state.s2;


--A1L802 is data~4451
--operation mode is normal

A1L802 = rst & xpage[3] & (state.s6 # state.s2);

--A1L282 is data~4597
--operation mode is normal

A1L282 = rst & xpage[3] & (state.s6 # state.s2);


--A1L11 is Mux~514
--operation mode is normal

A1L11 = addr[3] & addr[1] & addr[0] & addr[2];

--A1L73 is Mux~540
--operation mode is normal

A1L73 = addr[3] & addr[1] & addr[0] & addr[2];


--A1L902 is data~4452
--operation mode is normal

A1L902 = A1L802 # A1L402 & rst & !A1L11;

--A1L382 is data~4598
--operation mode is normal

A1L382 = A1L802 # A1L402 & rst & !A1L11;


--A1L012 is data~4453
--operation mode is normal

A1L012 = rst & (!addr[3]);

--A1L482 is data~4599
--operation mode is normal

A1L482 = rst & (!addr[3]);


--A1L21 is Mux~515
--operation mode is normal

A1L21 = addr[0] & (addr[2]) # !addr[0] & addr[1] & !addr[2] & addr[4];

--A1L83 is Mux~541
--operation mode is normal

A1L83 = addr[0] & (addr[2]) # !addr[0] & addr[1] & !addr[2] & addr[4];


--A1L31 is Mux~516
--operation mode is normal

A1L31 = addr[0] & (addr[2]) # !addr[0] & addr[1] & !addr[2] & !addr[4];

--A1L93 is Mux~542
--operation mode is normal

A1L93 = addr[0] & (addr[2]) # !addr[0] & addr[1] & !addr[2] & !addr[4];


--A1L112 is data~4454
--operation mode is normal

A1L112 = state.s18 & (A1L31 # state.s13 & A1L21) # !state.s18 & state.s13 & A1L21;

--A1L582 is data~4600
--operation mode is normal

A1L582 = state.s18 & (A1L31 # state.s13 & A1L21) # !state.s18 & state.s13 & A1L21;


--A1L212 is data~4455
--operation mode is normal

A1L212 = A1L702 # A1L902 # A1L012 & A1L112;

--A1L682 is data~4601
--operation mode is normal

A1L682 = A1L702 # A1L902 # A1L012 & A1L112;


--state.s9 is state.s9
--operation mode is normal

state.s9_lut_out = A1L224 # rst & (A1L46 # !state.s19);
state.s9 = DFFEA(state.s9_lut_out, !A1L263Q, , , , , );

--A1L793Q is state.s9~53
--operation mode is normal

A1L793Q = state.s9;


--state.01110 is state.01110
--operation mode is normal

state.01110_lut_out = A1L324 # state.01110 & !rst & !A1L614;
state.01110 = DFFEA(state.01110_lut_out, !A1L263Q, , , , , );

--A1L973Q is state.01110~53
--operation mode is normal

A1L973Q = state.01110;


--A1L312 is data~4456
--operation mode is normal

A1L312 = rst & (state.s9 # state.01110);

--A1L782 is data~4602
--operation mode is normal

A1L782 = rst & (state.s9 # state.01110);


--A1L614 is state~1866
--operation mode is normal

A1L614 = A1L761Q $ A1L471Q;

--A1L534 is state~1919
--operation mode is normal

A1L534 = A1L761Q $ A1L471Q;


--A1L412 is data~4457
--operation mode is normal

A1L412 = A1L312 # !rst & (A1L781Q # A1L614);

--A1L882 is data~4603
--operation mode is normal

A1L882 = A1L312 # !rst & (A1L781Q # A1L614);


--A1L512 is data~4458
--operation mode is normal

A1L512 = rst & (addr[4] & state.s11 # !addr[4] & (state.s16));

--A1L982 is data~4604
--operation mode is normal

A1L982 = rst & (addr[4] & state.s11 # !addr[4] & (state.s16));


--A1L41 is Mux~517
--operation mode is normal

A1L41 = addr[2] & !addr[3] & (addr[0] $ !addr[1]) # !addr[2] & !addr[0] & addr[1] & addr[3];

--A1L04 is Mux~543
--operation mode is normal

A1L04 = addr[2] & !addr[3] & (addr[0] $ !addr[1]) # !addr[2] & !addr[0] & addr[1] & addr[3];


--A1L612 is data~4459
--operation mode is normal

A1L612 = A1L412 # A1L512 & A1L41;

--A1L092 is data~4605
--operation mode is normal

A1L092 = A1L412 # A1L512 & A1L41;


--state.s19 is state.s19
--operation mode is normal

state.s19_lut_out = !A1L424 & (state.s19 # rst # A1L614);
state.s19 = DFFEA(state.s19_lut_out, !A1L263Q, , , , , );

--A1L514Q is state.s19~24
--operation mode is normal