hdllib.ref

通过UART从PC主机读取图片数据

AR vga behavioral E:/FPGA/Exp6-VGA/vga.vhd sub00/vhpl05
EN vga NULL E:/FPGA/Exp6-VGA/vga.vhd sub00/vhpl04
EN top NULL E:/FPGA/Exp6-VGA/top.vhd sub00/vhpl06
EN wrlogo NULL E:/FPGA/Exp6-VGA/wrlogo.vhd sub00/vhpl02
AR top behavioral E:/FPGA/Exp6-VGA/top.vhd sub00/vhpl07
AR uartrec behavioral E:/FPGA/Exp6-VGA/uartrec.vhd sub00/vhpl01
AR wrlogo behavioral E:/FPGA/Exp6-VGA/wrlogo.vhd sub00/vhpl03
EN uartrec NULL E:/FPGA/Exp6-VGA/uartrec.vhd sub00/vhpl00