testadd.vhd

来自「用于实现两个数相加的vhdl代码」· VHDL 代码 · 共 89 行

-------------------------------------------------------
-- Test bench for FULLADDER
--
-- See FULLADD.VHD for a description.
--
use work.all;

entity TESTBNCH is
end TESTBNCH;

architecture stimulus of TESTBNCH is
    component FULLADDER
        port (
            X: in bit;
            Y: in bit;
            Cin: in bit;
            Cout: out bit;
            Sum: out bit
        );
    end component;
    constant PERIOD: time := 100 ns;
    signal X: bit;
    signal Y: bit;
    signal Cin: bit;
    signal Cout: bit;
    signal Sum: bit;
    signal done: boolean := false;

begin
    DUT: FULLADDER port map ( 
            X => X,
            Y => Y,
            Cin => Cin,
            Cout => Cout,
            Sum => Sum
          );

    STIMULUS1: process
    begin
        -- Sequential stimulus goes here...
        Cin <= '0';
        Y <= '0';
        X <= '0';
        wait for PERIOD;    -- Sum='0', Cout='0'
        assert (Sum = '0' and Cout = '0')
            report "Adder failed!" severity error;

        Cin <= '0';
        Y <= '1';
        X <= '0';
        wait for PERIOD;    -- Sum='1', Cout='0'
        assert (Sum = '1' and Cout = '0')
            report "Adder failed!" severity error;

        Cin <= '0';
        Y <= '1';
        X <= '1';
        wait for PERIOD;    -- Sum='0', Cout='1'
        assert (Sum = '0' and Cout = '1')
            report "Adder failed!" severity error;

        Cin <= '1';
        Y <= '0';
        X <= '0';
        wait for PERIOD;    -- Sum='1', Cout='0'
        assert (Sum = '1' and Cout = '0')
            report "Adder failed!" severity error;

        Cin <= '1';
        Y <= '1';
        X <= '0';
        wait for PERIOD;    -- Sum='0', Cout='1'
        assert (Sum = '0' and Cout = '1')
            report "Adder failed!" severity error;

        Cin <= '1';
        Y <= '1';
        X <= '1';
        wait for PERIOD;    -- Sum='1', Cout='1'
        assert (Sum = '1' and Cout = '1')
            report "Adder failed!" severity error;

        done <= true;
        wait;
    end process;

end stimulus;