halfmin.fit

VHDL电子抢答器的实现。有多个文件

-- MAX+plus II Compiler Fit File      
-- Version 10.1 06/12/2001            
-- Compiled: 12/12/2004 15:34:27      

-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "halfmin"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "clk"                          : INPUT_PIN  = 1      ;
    "en"                           : INPUT_PIN  = 2      ;
    "eq"                           : INPUT_PIN  = 42     ;
    "alarm"                        : OUTPUT_PIN = 21     ;
    "h0"                           : OUTPUT_PIN = 66     ;
    "h1"                           : OUTPUT_PIN = 64     ;
    "h2"                           : OUTPUT_PIN = 67     ;
    "h3"                           : OUTPUT_PIN = 65     ;
    "l0"                           : OUTPUT_PIN = 23     ;
    "l1"                           : OUTPUT_PIN = 25     ;
    "l2"                           : OUTPUT_PIN = 24     ;
    "l3"                           : OUTPUT_PIN = 22     ;
    "|LPM_ADD_SUB:81|addcore:adder|pcarry1" : LOCATION   = LC8_B21;
    "|LPM_ADD_SUB:81|addcore:adder|pcarry2" : LOCATION   = LC2_B21;
    ":4"                           : LOCATION   = LC1_B1 ;
    ":14"                          : LOCATION   = LC2_B1 ;  -- dw3
    ":15"                          : LOCATION   = LC6_B1 ;  -- dw2
    ":16"                          : LOCATION   = LC8_B1 ;  -- dw1
    ":17"                          : LOCATION   = LC4_B1 ;  -- dw0
    ":18"                          : LOCATION   = LC5_B21;  -- gw3
    ":19"                          : LOCATION   = LC1_B21;  -- gw2
    ":20"                          : LOCATION   = LC7_B21;  -- gw1
    ":21"                          : LOCATION   = LC3_B21;  -- gw0
    ":69"                          : LOCATION   = LC4_B21;
    ":70"                          : LOCATION   = LC5_B1 ;
    ":108"                         : LOCATION   = LC7_B1 ;
    ":162"                         : LOCATION   = LC6_B21;
    "~265~1"                       : LOCATION   = LC3_B1 ;
    "~283~1"                       : LOCATION   = LC1_B13;

END;

INTERNAL_INFO "halfmin"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD4P1   : LORAX = "1:FB4->LC1_B1,->LC2_B1,->LC6_B1,->LC8_B1,->LC4_B1,->LC5_B21,->LC1_B21,->LC7_B21,->LC3_B21|";
    OD1P2   : LORAX = "1:FB1|2:FH1R1|3:PA20R1C0->LC1_B1,->LC2_B1,->LC4_B1,->LC3_B1|,3:PA20R1C12->LC1_B13|,3:PA20R1C20->LC7_B21|||";
    OD3P42  : LORAX = "1:FB3|2:FH3R1|3:PA5R1C0->LC1_B1,->LC2_B1,->LC4_B1,->LC3_B1|,3:PA5R1C12->LC1_B13|,3:PA5R1C20->LC7_B21|||";
    LC1_B1  : LORAX = "1:MSW0R1C0,HHL22R1->OH8R1P21|";
    LC2_B1  : LORAX = "1:MSW1R1C0,HHL8R1->OH9R1P22|";
    LC6_B1  : LORAX = "1:MSW5R1C1,G81R1->OH13R1P24|";
    LC8_B1  : LORAX = "1:MSW7R1C0,HHL46R1->OH15R1P25|";
    LC4_B1  : LORAX = "1:MSW3R1C1,HHL13R1->OH11R1P23|";
    LC5_B21 : LORAX = "1:MSW4R1C20,HHR43R1->OH4R1P65|";
    LC1_B21 : LORAX = "1:MSW0R1C20,HHR21R1->OH0R1P67|";
    LC7_B21 : LORAX = "1:MSW6R1C20,HHR40R1->OH6R1P64|";
    LC3_B21 : LORAX = "1:MSW2R1C21,G32R1->OH2R1P66|";
    LC4_B21 : LORAX = "1:MSW3R1C21|2:G33R1,PA21R1C0->LC1_B1,->LC2_B1,->LC4_B1|,2:HHR17R1,PA19R1C12->LC1_B13||";
    LC5_B1  : LORAX = "1:MSW4R1C0,G50R1,PA14R1C20->LC5_B21,->LC1_B21,->LC3_B21,->LC4_B21,->LC6_B21|";
    LC1_B13 : LORAX = "1:MSW0R1C12,HHR22R1,PA10R1C20->LC5_B21,->LC1_B21,->LC3_B21|";
	LC8_B21 : LORAX2 = "X, X, LC3_B21, LC7_B21";
	LC2_B21 : LORAX2 = "X, LC1_B21, LC3_B21, LC7_B21";
	LC1_B1  : LORAX2 = "OD3P42, OD1P2, LC1_B1, LC4_B21";
	LC2_B1  : LORAX2 = "OD3P42, OD1P2, LC7_B1, LC4_B21";
	LC6_B1  : LORAX2 = "LC3_B1, LC6_B1, LC8_B1, LC4_B1";
	LC8_B1  : LORAX2 = "X, LC3_B1, LC8_B1, LC4_B1";
	LC4_B1  : LORAX2 = "OD3P42, OD1P2, LC4_B21, LC4_B1";
	LC5_B21 : LORAX2 = "LC5_B21, LC2_B21, LC1_B13, LC5_B1";
	LC1_B21 : LORAX2 = "LC8_B21, LC1_B21, LC1_B13, LC5_B1";
	LC7_B21 : LORAX2 = "OD3P42, OD1P2, LC6_B21, LC4_B21";
	LC3_B21 : LORAX2 = "X, LC3_B21, LC5_B1, LC1_B13";
	LC4_B21 : LORAX2 = "X, LC5_B21, LC2_B21, LC5_B1";
	LC5_B1  : LORAX2 = "LC2_B1, LC6_B1, LC8_B1, LC4_B1";
	LC7_B1  : LORAX2 = "LC2_B1, LC6_B1, LC8_B1, LC4_B1";
	LC6_B21 : LORAX2 = "X, LC7_B21, LC3_B21, LC5_B1";
	LC3_B1  : LORAX2 = "X, OD1P2, OD3P42, LC5_B1";
	LC1_B13 : LORAX2 = "X, OD1P2, OD3P42, LC4_B21";
END;