c60.fit

VHDL电子抢答器的实现。有多个文件

-- MAX+plus II Compiler Fit File      
-- Version 10.1 06/12/2001            
-- Compiled: 12/12/2004 15:09:38      

-- Copyright (C) 1988-2001 Altera Corporation
-- Any megafunction design, and related net list (encrypted or decrypted),
-- support information, device programming or simulation file, and any other
-- associated documentation or information provided by Altera or a partner
-- under Altera's Megafunction Partnership Program may be used only to
-- program PLD devices (but not masked PLD devices) from Altera.  Any other
-- use of such megafunction design, net list, support information, device
-- programming or simulation file, or any other related documentation or
-- information is prohibited for any other purpose, including, but not
-- limited to modification, reverse engineering, de-compiling, or use with
-- any other silicon devices, unless such use is explicitly licensed under
-- a separate agreement with Altera or a megafunction partner.  Title to
-- the intellectual property, including patents, copyrights, trademarks,
-- trade secrets, or maskworks, embodied in any such megafunction design,
-- net list, support information, device programming or simulation file, or
-- any other related documentation or information provided by Altera or a
-- megafunction partner, remains with Altera, the megafunction partner, or
-- their respective licensors.  No other licenses, including any licenses
-- needed under any third party's intellectual property, are provided herein.

CHIP "c60"
BEGIN

    DEVICE = "EPF10K10LC84-3";

    "clk"                          : INPUT_PIN  = 1      ;
    "en"                           : INPUT_PIN  = 2      ;
    "eq"                           : INPUT_PIN  = 42     ;
    "alarm"                        : OUTPUT_PIN = 21     ;
    "h0"                           : OUTPUT_PIN = 64     ;
    "h1"                           : OUTPUT_PIN = 65     ;
    "h2"                           : OUTPUT_PIN = 67     ;
    "h3"                           : OUTPUT_PIN = 66     ;
    "l0"                           : OUTPUT_PIN = 23     ;
    "l1"                           : OUTPUT_PIN = 22     ;
    "l2"                           : OUTPUT_PIN = 25     ;
    "l3"                           : OUTPUT_PIN = 24     ;
    "|LPM_ADD_SUB:81|addcore:adder|pcarry2" : LOCATION   = LC1_B22;
    "|LPM_ADD_SUB:86|addcore:adder|pcarry1" : LOCATION   = LC5_B9 ;
    ":4"                           : LOCATION   = LC1_B3 ;
    ":14"                          : LOCATION   = LC6_B9 ;  -- dw3
    ":15"                          : LOCATION   = LC8_B9 ;  -- dw2
    ":16"                          : LOCATION   = LC2_B9 ;  -- dw1
    ":17"                          : LOCATION   = LC4_B9 ;  -- dw0
    ":18"                          : LOCATION   = LC2_B22;  -- gw3
    ":19"                          : LOCATION   = LC4_B22;  -- gw2
    ":20"                          : LOCATION   = LC5_B22;  -- gw1
    ":21"                          : LOCATION   = LC6_B22;  -- gw0
    ":69"                          : LOCATION   = LC7_B22;
    ":70"                          : LOCATION   = LC1_B9 ;
    ":108"                         : LOCATION   = LC7_B9 ;
    ":153"                         : LOCATION   = LC8_B22;
    ":171"                         : LOCATION   = LC1_B18;
    "~265~1"                       : LOCATION   = LC3_B9 ;
    "~283~1"                       : LOCATION   = LC3_B22;

END;

INTERNAL_INFO "c60"
BEGIN
	DEVICE = EPF10K10LC84-3;
    OD4P1   : LORAX = "1:FB4->LC1_B3,->LC6_B9,->LC8_B9,->LC2_B9,->LC4_B9,->LC2_B22,->LC4_B22,->LC5_B22,->LC6_B22|";
    OD1P2   : LORAX = "1:FB1|2:FH1R1|3:PA20R1C2->LC1_B3|,3:PA20R1C8->LC6_B9,->LC4_B9,->LC3_B9|,3:PA20R1C21->LC4_B22,->LC6_B22,->LC3_B22|||";
    OD3P42  : LORAX = "1:FB3|2:FH3R1|3:PA5R1C2->LC1_B3|,3:PA5R1C8->LC6_B9,->LC4_B9,->LC3_B9|,3:PA5R1C21->LC4_B22,->LC6_B22,->LC3_B22|||";
    LC1_B3  : LORAX = "1:MSW0R1C2,HHL21R1->OH8R1P21|";
    LC6_B9  : LORAX = "1:MSW5R1C8,HHL45R1->OH13R1P24|";
    LC8_B9  : LORAX = "1:MSW7R1C8,HHL37R1->OH15R1P25|";
    LC2_B9  : LORAX = "1:MSW1R1C8,HHL2R1->OH9R1P22|";
    LC4_B9  : LORAX = "1:MSW3R1C8,HHL6R1->OH11R1P23|";
    LC2_B22 : LORAX = "1:MSW2R1C20,HHR1R1->OH2R1P66|";
    LC4_B22 : LORAX = "1:MSW0R1C20,HHR21R1->OH0R1P67|";
    LC5_B22 : LORAX = "1:MSW4R1C21,HHR38R1->OH4R1P65|";
    LC6_B22 : LORAX = "1:MSW6R1C20,HHR40R1->OH6R1P64|2:PA9R1C17->LC1_B18||";
    LC7_B22 : LORAX = "1:|2:MSW7R1C20,G91R1,PA7R1C2->LC1_B3|,2:MSW6R1C21,G84R1,PA1R1C8->LC6_B9,->LC4_B9||";
    LC1_B9  : LORAX = "1:MSW0R1C8,G47R1|2:PA3R1C17->LC1_B18|,2:PA3R1C21->LC2_B22,->LC5_B22,->LC7_B22,->LC8_B22||";
    LC1_B18 : LORAX = "1:MSW0R1C17,HHR20R1,PA16R1C21->LC6_B22|";
	LC1_B22 : LORAX2 = "X, LC4_B22, LC6_B22, LC5_B22";
	LC5_B9  : LORAX2 = "X, X, LC2_B9, LC4_B9";
	LC1_B3  : LORAX2 = "OD3P42, OD1P2, LC1_B3, LC7_B22";
	LC6_B9  : LORAX2 = "OD3P42, OD1P2, LC7_B9, LC7_B22";
	LC8_B9  : LORAX2 = "LC3_B9, LC5_B9, LC8_B9, LC1_B9";
	LC2_B9  : LORAX2 = "LC3_B9, LC2_B9, LC4_B9, LC1_B9";
	LC4_B9  : LORAX2 = "OD3P42, OD1P2, LC7_B22, LC4_B9";
	LC2_B22 : LORAX2 = "LC2_B22, LC1_B22, LC3_B22, LC1_B9";
	LC4_B22 : LORAX2 = "OD3P42, OD1P2, LC8_B22, LC7_B22";
	LC5_B22 : LORAX2 = "LC5_B22, LC6_B22, LC1_B9, LC3_B22";
	LC6_B22 : LORAX2 = "OD3P42, OD1P2, LC1_B18, LC7_B22";
	LC7_B22 : LORAX2 = "X, LC2_B22, LC1_B22, LC1_B9";
	LC1_B9  : LORAX2 = "LC6_B9, LC8_B9, LC2_B9, LC4_B9";
	LC7_B9  : LORAX2 = "LC6_B9, LC8_B9, LC2_B9, LC4_B9";
	LC8_B22 : LORAX2 = "LC4_B22, LC5_B22, LC6_B22, LC1_B9";
	LC1_B18 : LORAX2 = "X, X, LC6_B22, LC1_B9";
	LC3_B9  : LORAX2 = "X, X, OD1P2, OD3P42";
	LC3_B22 : LORAX2 = "X, OD1P2, OD3P42, LC7_B22";
END;