a6850.fit.eqn

本文件是altera公司fpga的ip核

V1_int_dout[5]_lut_out = V1_int_dout[5] $ (V1_int_dout[5]_carry_eqn);
V1_int_dout[5] = DFFEAS(V1_int_dout[5]_lut_out, !GLOBAL(txclk), GLOBAL(reset), , , , , V1L62, );

--V1L22 is tcntl:u8|txclkcnt:u3|int_dout[5]~55 at LC_X16_Y8_N6
--operation mode is arithmetic

V1L22_cout_0 = !V1L91 # !V1_int_dout[5];
V1L22 = CARRY(V1L22_cout_0);

--V1L32 is tcntl:u8|txclkcnt:u3|int_dout[5]~55COUT1_91 at LC_X16_Y8_N6
--operation mode is arithmetic

V1L32_cout_1 = !V1L02 # !V1_int_dout[5];
V1L32 = CARRY(V1L32_cout_1);


--V1_int_dout[4] is tcntl:u8|txclkcnt:u3|int_dout[4] at LC_X16_Y8_N5
--operation mode is arithmetic

V1_int_dout[4]_carry_eqn = (!V1L51 & GND) # (V1L51 & VCC);
V1_int_dout[4]_lut_out = V1_int_dout[4] $ !V1_int_dout[4]_carry_eqn;
V1_int_dout[4] = DFFEAS(V1_int_dout[4]_lut_out, !GLOBAL(txclk), GLOBAL(reset), , , , , V1L62, );

--V1L91 is tcntl:u8|txclkcnt:u3|int_dout[4]~59 at LC_X16_Y8_N5
--operation mode is arithmetic

V1L91_cout_0 = V1_int_dout[4] & !V1L51;
V1L91 = CARRY(V1L91_cout_0);

--V1L02 is tcntl:u8|txclkcnt:u3|int_dout[4]~59COUT1_89 at LC_X16_Y8_N5
--operation mode is arithmetic

V1L02_cout_1 = V1_int_dout[4] & !V1L51;
V1L02 = CARRY(V1L02_cout_1);


--V1L1 is tcntl:u8|txclkcnt:u3|comb_proc~244 at LC_X17_Y8_N5
--operation mode is normal

G1_int_dout[1]_qfbk = G1_int_dout[1];
V1L1 = V1_int_dout[4] & G1_int_dout[1]_qfbk & V1_int_dout[5] # !V1_int_dout[4] & !G1_int_dout[1]_qfbk & !V1_int_dout[5];

--G1_int_dout[1] is cntl_reg:u6|int_dout[1] at LC_X17_Y8_N5
--operation mode is normal

G1_int_dout[1] = DFFEAS(V1L1, !GLOBAL(txclk), GLOBAL(reset), , H1_cntl_we, H1_dataq[1], , , VCC);


--V1_int_dout[0] is tcntl:u8|txclkcnt:u3|int_dout[0] at LC_X16_Y8_N1
--operation mode is arithmetic

V1_int_dout[0]_lut_out = V1_int_dout[0] $ T1L2;
V1_int_dout[0] = DFFEAS(V1_int_dout[0]_lut_out, !GLOBAL(txclk), GLOBAL(reset), , , , , V1L62, );

--V1L6 is tcntl:u8|txclkcnt:u3|int_dout[0]~63 at LC_X16_Y8_N1
--operation mode is arithmetic

V1L6_cout_0 = V1_int_dout[0] & T1L2;
V1L6 = CARRY(V1L6_cout_0);

--V1L7 is tcntl:u8|txclkcnt:u3|int_dout[0]~63COUT1_84 at LC_X16_Y8_N1
--operation mode is arithmetic

V1L7_cout_1 = V1_int_dout[0] & T1L2;
V1L7 = CARRY(V1L7_cout_1);


--V1_int_dout[1] is tcntl:u8|txclkcnt:u3|int_dout[1] at LC_X16_Y8_N2
--operation mode is arithmetic

V1_int_dout[1]_lut_out = V1_int_dout[1] $ (V1L6);
V1_int_dout[1] = DFFEAS(V1_int_dout[1]_lut_out, !GLOBAL(txclk), GLOBAL(reset), , , , , V1L62, );

--V1L9 is tcntl:u8|txclkcnt:u3|int_dout[1]~67 at LC_X16_Y8_N2
--operation mode is arithmetic

V1L9_cout_0 = !V1L6 # !V1_int_dout[1];
V1L9 = CARRY(V1L9_cout_0);

--V1L01 is tcntl:u8|txclkcnt:u3|int_dout[1]~67COUT1_86 at LC_X16_Y8_N2
--operation mode is arithmetic

V1L01_cout_1 = !V1L7 # !V1_int_dout[1];
V1L01 = CARRY(V1L01_cout_1);


--V1_int_dout[2] is tcntl:u8|txclkcnt:u3|int_dout[2] at LC_X16_Y8_N3
--operation mode is arithmetic

V1_int_dout[2]_lut_out = V1_int_dout[2] $ !V1L9;
V1_int_dout[2] = DFFEAS(V1_int_dout[2]_lut_out, !GLOBAL(txclk), GLOBAL(reset), , , , , V1L62, );

--V1L21 is tcntl:u8|txclkcnt:u3|int_dout[2]~71 at LC_X16_Y8_N3
--operation mode is arithmetic

V1L21_cout_0 = V1_int_dout[2] & !V1L9;
V1L21 = CARRY(V1L21_cout_0);

--V1L31 is tcntl:u8|txclkcnt:u3|int_dout[2]~71COUT1_87 at LC_X16_Y8_N3
--operation mode is arithmetic

V1L31_cout_1 = V1_int_dout[2] & !V1L01;
V1L31 = CARRY(V1L31_cout_1);


--V1_int_dout[3] is tcntl:u8|txclkcnt:u3|int_dout[3] at LC_X16_Y8_N4
--operation mode is arithmetic

V1_int_dout[3]_lut_out = V1_int_dout[3] $ V1L21;
V1_int_dout[3] = DFFEAS(V1_int_dout[3]_lut_out, !GLOBAL(txclk), GLOBAL(reset), , , , , V1L62, );

--V1L51 is tcntl:u8|txclkcnt:u3|int_dout[3]~75 at LC_X16_Y8_N4
--operation mode is arithmetic

V1L51 = V1L61;


--V1L2 is tcntl:u8|txclkcnt:u3|comb_proc~245 at LC_X16_Y8_N9
--operation mode is normal

V1L2 = V1_int_dout[1] & V1_int_dout[2] & V1_int_dout[3] & V1_int_dout[0];


--M1L9 is rxcntl:u1|rxcntlsm:u1|next_state.db1_data~106 at LC_X17_Y8_N8
--operation mode is normal

G1_int_dout[0]_qfbk = G1_int_dout[0];
M1L9 = !G1_int_dout[0]_qfbk & !G1_int_dout[1];

--G1_int_dout[0] is cntl_reg:u6|int_dout[0] at LC_X17_Y8_N8
--operation mode is normal

G1_int_dout[0] = DFFEAS(M1L9, !GLOBAL(txclk), GLOBAL(reset), , H1_cntl_we, H1_dataq[0], , , VCC);


--V1L3 is tcntl:u8|txclkcnt:u3|comb_proc~246 at LC_X16_Y7_N3
--operation mode is normal

V1L3 = !M1L9 & (V1_int_dout[6] # !V1L1 # !V1L2);


--V1_tc is tcntl:u8|txclkcnt:u3|tc at LC_X16_Y7_N5
--operation mode is normal

V1_tc = T1_state.ini & !V1L3 & (!G1_int_dout[1] # !G1_int_dout[0]);


--T1L9 is tcntl:u8|transm:u1|Select~358 at LC_X16_Y7_N7
--operation mode is normal

T1L9 = R1L4 # R1_int_dout[2] & T1L6 & V1_tc;


--R1L7 is stsrg:u4|tx_stsrg:u1|local_tdre~40 at LC_X16_Y7_N1
--operation mode is normal

R1L7 = G1L01 # R1L6 & (T1L9 # !R1_int_dout[2]);


--F1_data[3] is rxshftrg:u5|data[3] at LC_X19_Y9_N9
--operation mode is normal

F1_data[3]_lut_out = F1_data[4] & (!G1_int_dout[1] # !G1_int_dout[0]);
F1_data[3] = DFFEAS(F1_data[3]_lut_out, GLOBAL(rxclk), GLOBAL(reset), , F1L6, , , , );


--F1L41 is rxshftrg:u5|par_out[2]~659 at LC_X19_Y10_N4
--operation mode is normal

F1L41 = G1_int_dout[3] & (G1_int_dout[4] & F1_data[2] # !G1_int_dout[4] & (F1_data[3])) # !G1_int_dout[3] & (F1_data[3]);


--S1_data_done is stsrg:u4|rx_stsrg:u2|data_done at LC_X19_Y8_N8
--operation mode is normal

S1_data_done_lut_out = !G1L01 & (S1_data_done # S1L01 & S1L9);
S1_data_done = DFFEAS(S1_data_done_lut_out, GLOBAL(rxclk), GLOBAL(reset), , , , , , );


--S1_sts_done is stsrg:u4|rx_stsrg:u2|sts_done at LC_X20_Y6_N3
--operation mode is normal

S1_sts_done_lut_out = !G1L01 & (S1_sts_done # S1L61 & S1_int_dout[4]);
S1_sts_done = DFFEAS(S1_sts_done_lut_out, GLOBAL(rxclk), GLOBAL(reset), , , , , , );


--S1L11 is stsrg:u4|rx_stsrg:u2|local_dcd~119 at LC_X20_Y6_N8
--operation mode is normal

S1L11 = !S1_sts_done # !S1_data_done;


--S1L21 is stsrg:u4|rx_stsrg:u2|local_dcd~120 at LC_X20_Y6_N9
--operation mode is normal

S1_int_dout[4]_qfbk = S1_int_dout[4];
S1L21 = dcd # !G1L01 & S1_int_dout[4]_qfbk & S1L11;

--S1_int_dout[4] is stsrg:u4|rx_stsrg:u2|int_dout[4] at LC_X20_Y6_N9
--operation mode is normal

S1_int_dout[4] = DFFEAS(S1L21, GLOBAL(rxclk), GLOBAL(reset), , , , , , );


--F1_data[4] is rxshftrg:u5|data[4] at LC_X19_Y9_N5
--operation mode is normal

F1_data[4]_lut_out = F1_data[5] & (!G1_int_dout[0] # !G1_int_dout[1]);
F1_data[4] = DFFEAS(F1_data[4]_lut_out, GLOBAL(rxclk), GLOBAL(reset), , F1L6, , , , );


--F1L51 is rxshftrg:u5|par_out[3]~660 at LC_X19_Y9_N8
--operation mode is normal

F1L51 = G1_int_dout[3] & (G1_int_dout[4] & F1_data[3] # !G1_int_dout[4] & (F1_data[4])) # !G1_int_dout[3] & (F1_data[4]);


--F1_data[5] is rxshftrg:u5|data[5] at LC_X19_Y9_N0
--operation mode is normal

F1_data[5]_lut_out = F1_data[6] & (!G1_int_dout[0] # !G1_int_dout[1]);
F1_data[5] = DFFEAS(F1_data[5]_lut_out, GLOBAL(rxclk), GLOBAL(reset), , F1L6, , , , );


--F1L61 is rxshftrg:u5|par_out[4]~661 at LC_X19_Y9_N2
--operation mode is normal

F1L61 = G1_int_dout[3] & (G1_int_dout[4] & F1_data[4] # !G1_int_dout[4] & (F1_data[5])) # !G1_int_dout[3] & (F1_data[5]);


--Q1_int_dout is rxcntl:u1|framerr:u4|int_dout at LC_X19_Y9_N4
--operation mode is normal

Q1_int_dout_lut_out = !G1L01 & (Q1_int_dout # !rxdata & A1L92);
Q1_int_dout = DFFEAS(Q1_int_dout_lut_out, GLOBAL(rxclk), GLOBAL(reset), , , , , , );


--A1L03 is rtl~372 at LC_X19_Y9_N3
--operation mode is normal

A1L03 = G1L21 & (Q1_int_dout) # !G1L21 & !rxdata & (A1L92);


--F1_data[6] is rxshftrg:u5|data[6] at LC_X18_Y9_N3
--operation mode is normal

F1_data[6]_lut_out = F1_data[7] & (!G1_int_dout[1] # !G1_int_dout[0]);
F1_data[6] = DFFEAS(F1_data[6]_lut_out, GLOBAL(rxclk), GLOBAL(reset), , F1L6, , , , );


--F1L71 is rxshftrg:u5|par_out[5]~662 at LC_X18_Y9_N8
--operation mode is normal

F1L71 = G1_int_dout[4] & (G1_int_dout[3] & F1_data[5] # !G1_int_dout[3] & (F1_data[6])) # !G1_int_dout[4] & (F1_data[6]);


--S1L31 is stsrg:u4|rx_stsrg:u2|local_ovr~145 at LC_X19_Y8_N4
--operation mode is normal

S1_int_dout[2]_qfbk = S1_int_dout[2];
S1L31 = !G1L01 & (M1L32 & M1_state.overrun # !M1L32 & (S1_int_dout[2]_qfbk));

--S1_int_dout[2] is stsrg:u4|rx_stsrg:u2|int_dout[2] at LC_X19_Y8_N4
--operation mode is normal

S1_int_dout[2] = DFFEAS(S1L31, GLOBAL(rxclk), GLOBAL(reset), , , , , , );


--F1_data[7] is rxshftrg:u5|data[7] at LC_X18_Y9_N7
--operation mode is normal

F1_data[7]_lut_out = F1_data[8] & (!G1_int_dout[1] # !G1_int_dout[0]);
F1_data[7] = DFFEAS(F1_data[7]_lut_out, GLOBAL(rxclk), GLOBAL(reset), , F1L6, , , , );


--F1L81 is rxshftrg:u5|par_out[6]~663 at LC_X18_Y9_N5
--operation mode is normal

F1L81 = G1_int_dout[4] & (G1_int_dout[3] & (F1_data[6]) # !G1_int_dout[3] & F1_data[7]) # !G1_int_dout[4] & (F1_data[7]);


--G1L11 is cntl_reg:u6|stop_bits~4 at LC_X17_Y8_N0
--operation mode is normal

G1_int_dout[3]_qfbk = G1_int_dout[3];
G1L11 = G1_int_dout[3]_qfbk # !G1_int_dout[4];

--G1_int_dout[3] is cntl_reg:u6|int_dout[3] at LC_X17_Y8_N0
--operation mode is normal

G1_int_dout[3] = DFFEAS(G1L11, !GLOBAL(txclk), GLOBAL(reset), , H1_cntl_we, H1_dataq[3], , , VCC);


--C1L1 is par_tree:u2|parity_err~105 at LC_X19_Y8_N7
--operation mode is normal

C1L1 = F1L51 $ F1L41 $ F1L21 $ F1L31;


--F1_data[8] is rxshftrg:u5|data[8] at LC_X18_Y9_N6
--operation mode is normal

F1_data[8]_lut_out = rxdata & (!G1_int_dout[1] # !G1_int_dout[0]);
F1_data[8] = DFFEAS(F1_data[8]_lut_out, GLOBAL(rxclk), GLOBAL(reset), , F1L6, , , , );


--F1L91 is rxshftrg:u5|par_out[7]~664 at LC_X18_Y9_N2
--operation mode is normal

F1L91 = G1_int_dout[4] & (G1_int_dout[3] & F1_data[7] # !G1_int_dout[3] & (F1_data[8]));


--C1L2 is par_tree:u2|parity_err~106 at LC_X18_Y9_N9
--operation mode is normal

C1L2 = F1L91 $ F1L81 $ F1L61 $ F1L71;


--C1L3 is par_tree:u2|parity_err~107 at LC_X17_Y8_N1
--operation mode is normal

G1_int_dout[2]_qfbk = G1_int_dout[2];
C1L3 = F1_data[8] $ C1L2 $ (G1_int_dout[2]_qfbk & G1L11);

--G1_int_dout[2] is cntl_reg:u6|int_dout[2] at LC_X17_Y8_N1
--operation mode is normal

G1_int_dout[2] = DFFEAS(C1L3, !GLOBAL(txclk), GLOBAL(reset), , H1_cntl_we, H1_dataq[2], , , VCC);


--G1_int_dout[7] is cntl_reg:u6|int_dout[7] at LC_X17_Y8_N9
--operation mode is normal

G1_int_dout[7]_lut_out = GND;
G1_int_dout[7] = DFFEAS(G1_int_dout[7]_lut_out, !GLOBAL(txclk), GLOBAL(reset), , H1_cntl_we, H1_dataq[7], , , VCC);


--H1_dataq[6] is bus_cntl:u7|dataq[6] at LC_X15_Y8_N2
--operation mode is normal

H1_dataq[6]_lut_out = GND;
H1_dataq[6] = DFFEAS(H1_dataq[6]_lut_out, GLOBAL(txclk), GLOBAL(reset), , e, di[6], , , VCC);


--H1_cntl_reg1_we is bus_cntl:u7|cntl_reg1_we at LC_X18_Y8_N9
--operation mode is normal

H1_cntl_reg1_we_lut_out = H1L12 & !rs & !rw_n;
H1_cntl_reg1_we = DFFEAS(H1_cntl_reg1_we_lut_out, GLOBAL(txclk), GLOBAL(reset), , , , , , );


--H1_cntl_we is bus_cntl:u7|cntl_we at LC_X17_Y8_N7
--operation mode is normal

H1_cntl_reg2_we_qfbk = H1_cntl_reg2_we;
H1_cntl_we = H1_cntl_reg2_we_qfbk & !H1_cntl_reg1_we;

--H1_cntl_reg2_we is bus_cntl:u7|cntl_reg2_we at LC_X17_Y8_N7
--operation mode is normal

H1_cntl_reg2_we = DFFEAS(H1_cntl_we, !GLOBAL(txclk), GLOBAL(reset), , , H1_cntl_reg1_we, , , VCC);


--H1_dataq[5] is bus_cntl:u7|dataq[5] at LC_X15_Y8_N6
--operation mode is normal

H1_dataq[5]_lut_out = di[5];
H1_dataq[5] = DFFEAS(H1_dataq[5]_lut_out, GLOBAL(txclk), GLOBAL(reset), , e, , , , );


--H1_dataq[1] is bus_cntl:u7|dataq[1] at LC_X16_Y9_N6
--operation mode is normal

H1_dataq[1]_lut_out = GND;
H1_dataq[1] = DFFEAS(H1_dataq[1]_lut_out, GLOBAL(txclk), GLOBAL(reset), , e, di[1], , , VCC);


--H1_dataq[0] is bus_cntl:u7|dataq[0] at LC_X18_Y11_N2
--operation mode is normal

H1_dataq[0]_lut_out = di[0];
H1_dataq[0] = DFFEAS(H1_dataq[0]_lut_out, GLOBAL(txclk), GLOBAL(reset), , e, , , , );


--U1_int_dout[1] is tcntl:u8|datacnt:u2|int_dout[1] at LC_X16_Y9_N8
--operation mode is normal

U1_int_dout[1]_lut_out = !T1L1 & (U1_int_dout[1] $ U1L1);
U1_int_dout[1] = DFFEAS(U1_int_dout[1]_lut_out, !GLOBAL(txclk), GLOBAL(reset), , , , , , );


--U1_int_dout[2] is tcntl:u8|datacnt:u2|int_dout[2] at LC_X16_Y9_N0
--operation mode is normal

U1_int_dout[2]_lut_out = !T1L1 & (U1_int_dout[2] $ (U1_int_dout[1] & U1L1));
U1_int_dout[2] = DFFEAS(U1_int_dout[2]_lut_out, !GLOBAL(txclk), GLOBAL(reset), , , , , , );


--U1_int_dout[0] is tcntl:u8|datacnt:u2|int_dout[0] at LC_X17_Y9_N3
--operation mode is normal

U1_int_dout[0]_lut_out = !T1L1 & (U1_int_dout[0] $ (T1_state.data & V1_tc));
U1_int_dout[0] = DFFEAS(U1_int_dout[0]_lut_out, !GLOBAL(txclk), GLOBAL(reset), , , , , , );


--U1L6 is tcntl:u8|datacnt:u2|reduce_nor~25 at LC_X17_Y9_N9
--operation mode is normal

U1L6 = U1_int_dout[1] & U1_int_dout[2] & (U1_int_dout[0] $ !G1_int_dout[4]);


--T1L7 is tcntl:u8|transm:u1|next_state.start~254 at LC_X17_Y9_N7
--operation mode is normal

T1L7 = G1_int_dout[0] & (G1_int_dout[1] # T1_state.ini & !V1L3) # !G1_int_dout[0] & T1_state.ini & (!V1L3);


--L1_int_dout[7] is xmit_reg:u10|int_dout[7] at LC_X15_Y8_N4
--operation mode is normal

L1_int_dout[7]_lut_out = H1_dataq[7] & (!G1_int_dout[1] # !G1_int_dout[0]);
L1_int_dout[7] = DFFEAS(L1_int_dout[7]_lut_out, !GLOBAL(txclk), GLOBAL(reset), , L1L5, , , , );


--W1L1 is srpargen:u9|datamux:u1|data[7]~9 at LC_X16_Y9_N2
--operation mode is normal