a6850.hier_info

本文件是altera公司fpga的ip核

|A6850
reset => xmit_reg:u10.clr
reset => srpargen:u9.reset
reset => tcntl:u8.reset
reset => bus_cntl:u7.clr
reset => cntl_reg:u6.clr
reset => rxshftrg:u5.reset
reset => stsrg:u4.reset
reset => rcv_reg:u3.clr
reset => rxcntl:u1.reset
di[0] => bus_cntl:u7.di[0]
di[1] => bus_cntl:u7.di[1]
di[2] => bus_cntl:u7.di[2]
di[3] => bus_cntl:u7.di[3]
di[4] => bus_cntl:u7.di[4]
di[5] => bus_cntl:u7.di[5]
di[6] => bus_cntl:u7.di[6]
di[7] => bus_cntl:u7.di[7]
e => bus_cntl:u7.e
rw_n => bus_cntl:u7.rw
cs[0] => bus_cntl:u7.cs[0]
cs[1] => bus_cntl:u7.cs[1]
cs[2] => bus_cntl:u7.cs[2]
rs => bus_cntl:u7.rs
txclk => xmit_reg:u10.clk
txclk => srpargen:u9.txclk
txclk => tcntl:u8.txclk
txclk => bus_cntl:u7.txclk
txclk => cntl_reg:u6.clk
txclk => stsrg:u4.txclk
rxclk => bus_cntl:u7.rxclk
rxclk => rxshftrg:u5.clock
rxclk => stsrg:u4.rxclk
rxclk => rcv_reg:u3.clk
rxclk => rxcntl:u1.rxclk
rxdata => rxshftrg:u5.sli
rxdata => rxcntl:u1.rxdata
cts => stsrg:u4.cts_in
dcd => stsrg:u4.dcd_in
do[0] <= bus_cntl:u7.do[0]
do[1] <= bus_cntl:u7.do[1]
do[2] <= bus_cntl:u7.do[2]
do[3] <= bus_cntl:u7.do[3]
do[4] <= bus_cntl:u7.do[4]
do[5] <= bus_cntl:u7.do[5]
do[6] <= bus_cntl:u7.do[6]
do[7] <= bus_cntl:u7.do[7]
irq_n <= stsrg:u4.irq_n
txdata <= srpargen:u9.txdata
rts <= cntl_reg:u6.rts


|A6850|rxcntl:u1
reset => framerr:u4.clr
reset => rxcount:u3.clr
reset => datcount:u2.clr
reset => rxcntlsm:u1.reset
rxclk => framerr:u4.clk
rxclk => rxcount:u3.clk
rxclk => datcount:u2.clk
rxclk => rxcntlsm:u1.rxclk
mr => framerr:u4.sclr
mr => rxcntlsm:u1.mr
rxdata => rxcntlsm:u1.rxdata
db1 => rxcntlsm:u1.db1
db16 => rxcount:u3.mode
word_length => datcount:u2.mode
parity_en => rxcntlsm:u1.parity_en
stop_bits => framerr:u4.sel
stop_bits => rxcntlsm:u1.stop_bits
rdrf => rxcntlsm:u1.rdrf
shift_en <= rxcntlsm:u1.shift_en
frame_err <= framerr:u4.q
overrun_err <= rxcntlsm:u1.overrun_err
tran_en <= rxcntlsm:u1.tran_en


|A6850|rxcntl:u1|rxcntlsm:u1
reset => state~1.IN1
rxclk => state~0.IN1
mr => next_state.wait_start.OUTPUTSELECT
mr => next_state.synch.OUTPUTSELECT
mr => next_state.wait_data.OUTPUTSELECT
mr => next_state.sample_data.OUTPUTSELECT
mr => next_state.wait_parity.OUTPUTSELECT
mr => next_state.sample_parity.OUTPUTSELECT
mr => next_state.wait_stop1.OUTPUTSELECT
mr => next_state.sample_stop1.OUTPUTSELECT
mr => next_state.wait_stop2.OUTPUTSELECT
mr => next_state.sample_stop2.OUTPUTSELECT
mr => next_state.db1_data.OUTPUTSELECT
mr => next_state.db1_parity.OUTPUTSELECT
mr => next_state.db1_stop1.OUTPUTSELECT
mr => next_state.db1_stop2.OUTPUTSELECT
mr => next_state.overrun.OUTPUTSELECT
mr => shift_en~0.OUTPUTSELECT
mr => cnt_en~0.OUTPUTSELECT
mr => clr_cnt~1.OUTPUTSELECT
mr => dat_clr~0.OUTPUTSELECT
mr => frame_en~0.OUTPUTSELECT
mr => frame_err~0.OUTPUTSELECT
mr => overrun_err~0.OUTPUTSELECT
mr => tran_en~1.OUTPUTSELECT
rxdata => Select~4.IN1
rxdata => Select~4.IN2
rxdata => next_state~2.OUTPUTSELECT
rxdata => clr_cnt~0.OUTPUTSELECT
rxdata => next_state~1.OUTPUTSELECT
rxdata => next_state~0.OUTPUTSELECT
rxdata => Select~0.IN3
tc_half => clr_cnt~0.DATAA
tc_half => next_state~2.DATAA
tc_full => next_state~6.DATAB
tc_full => Select~2.IN2
tc_full => next_state~7.DATAB
tc_full => Select~2.IN3
tc_full => next_state~8.DATAB
tc_full => Select~2.IN4
tc_full => next_state~9.DATAB
tc_full => Select~2.IN5
tc_full => Select~6.IN5
tc_full => Select~7.IN3
tc_full => Select~8.IN5
tc_full => Select~9.IN4
db1 => next_state~1.DATAB
db1 => next_state~0.DATAB
dattc => Select~3.IN2
dattc => next_state~3.OUTPUTSELECT
dattc => next_state~4.OUTPUTSELECT
dattc => Select~3.IN3
dattc => Select~6.IN6
dattc => Select~10.IN4
parity_en => next_state~3.DATAB
parity_en => next_state~4.DATAB
stop_bits => Select~9.IN1
stop_bits => next_state~11.DATAB
stop_bits => tran_en~0.OUTPUTSELECT
stop_bits => next_state~5.OUTPUTSELECT
rdrf => next_state~5.DATAB
rdrf => Select~12.IN1
rdrf => Select~12.IN2
rdrf => Select~12.IN3
rdrf => tran_en~0.DATAB
rdrf => Select~1.IN6
rdrf => Select~1.IN7
rdrf => Select~1.IN8
rdrf => Select~4.IN10
rdrf => Select~4.IN11
rdrf => Select~4.IN12
shift_en <= shift_en~0.DB_MAX_OUTPUT_PORT_TYPE
dat_clr <= dat_clr~0.DB_MAX_OUTPUT_PORT_TYPE
cnt_en <= cnt_en~0.DB_MAX_OUTPUT_PORT_TYPE
clr_cnt <= clr_cnt~1.DB_MAX_OUTPUT_PORT_TYPE
frame_en <= frame_en~0.DB_MAX_OUTPUT_PORT_TYPE
frame_err <= frame_err~0.DB_MAX_OUTPUT_PORT_TYPE
overrun_err <= overrun_err~0.DB_MAX_OUTPUT_PORT_TYPE
tran_en <= tran_en~1.DB_MAX_OUTPUT_PORT_TYPE


|A6850|rxcntl:u1|datcount:u2
clk => int_dout[2].CLK
clk => int_dout[1].CLK
clk => int_dout[0].CLK
clk => int_dout[3].CLK
clr => int_dout[2].ACLR
clr => int_dout[1].ACLR
clr => int_dout[0].ACLR
clr => int_dout[3].ACLR
sclr => mux_dout[3].OUTPUTSELECT
sclr => mux_dout[2].OUTPUTSELECT
sclr => mux_dout[1].OUTPUTSELECT
sclr => mux_dout[0].OUTPUTSELECT
ce => tc1~0.IN0
ce => mux_dout~0.OUTPUTSELECT
ce => mux_dout~1.OUTPUTSELECT
ce => mux_dout~2.OUTPUTSELECT
ce => mux_dout~3.OUTPUTSELECT
mode => int_tc1.OUTPUTSELECT
tc1 <= tc1~0.DB_MAX_OUTPUT_PORT_TYPE


|A6850|rxcntl:u1|rxcount:u3
clk => int_dout[4].CLK
clk => int_dout[3].CLK
clk => int_dout[2].CLK
clk => int_dout[1].CLK
clk => int_dout[0].CLK
clk => int_dout[5].CLK
clr => int_dout[4].ACLR
clr => int_dout[3].ACLR
clr => int_dout[2].ACLR
clr => int_dout[1].ACLR
clr => int_dout[0].ACLR
clr => int_dout[5].ACLR
sclr => mux_dout[5].OUTPUTSELECT
sclr => mux_dout[4].OUTPUTSELECT
sclr => mux_dout[3].OUTPUTSELECT
sclr => mux_dout[2].OUTPUTSELECT
sclr => mux_dout[1].OUTPUTSELECT
sclr => mux_dout[0].OUTPUTSELECT
ce => tc1~0.IN0
ce => tc2~0.IN0
ce => mux_dout~0.OUTPUTSELECT
ce => mux_dout~1.OUTPUTSELECT
ce => mux_dout~2.OUTPUTSELECT
ce => mux_dout~3.OUTPUTSELECT
ce => mux_dout~4.OUTPUTSELECT
ce => mux_dout~5.OUTPUTSELECT
mode => int_tc1.OUTPUTSELECT
mode => int_tc2.OUTPUTSELECT
tc1 <= tc1~0.DB_MAX_OUTPUT_PORT_TYPE
tc2 <= tc2~0.DB_MAX_OUTPUT_PORT_TYPE


|A6850|rxcntl:u1|framerr:u4
clk => int_dout.CLK
clr => int_dout.ACLR
sclr => mux_dout.OUTPUTSELECT
ce => mux_dout~0.OUTPUTSELECT
sel => q~0.OUTPUTSELECT
d => q~0.DATAB
d => mux_dout~0.DATAB
q <= q~0.DB_MAX_OUTPUT_PORT_TYPE


|A6850|par_tree:u2
odd_even => parity.OUTPUTSELECT
parity_en => parity_err~1.OUTPUTSELECT
rx_parity => parity_err~0.IN0
din[0] => temp_par~0.IN1
din[1] => temp_par~0.IN0
din[2] => temp_par~1.IN0
din[3] => temp_par~2.IN0
din[4] => temp_par~3.IN0
din[5] => temp_par~4.IN0
din[6] => temp_par~5.IN0
din[7] => temp_par~6.IN0
parity_err <= parity_err~1.DB_MAX_OUTPUT_PORT_TYPE


|A6850|rcv_reg:u3
clk => int_dout[6].CLK
clk => int_dout[5].CLK
clk => int_dout[4].CLK
clk => int_dout[3].CLK
clk => int_dout[2].CLK
clk => int_dout[1].CLK
clk => int_dout[0].CLK
clk => int_dout[7].CLK
clr => int_dout[6].ACLR
clr => int_dout[5].ACLR
clr => int_dout[4].ACLR
clr => int_dout[3].ACLR
clr => int_dout[2].ACLR
clr => int_dout[1].ACLR
clr => int_dout[0].ACLR
clr => int_dout[7].ACLR
sclr => mux_dout[7].OUTPUTSELECT
sclr => mux_dout[6].OUTPUTSELECT
sclr => mux_dout[5].OUTPUTSELECT
sclr => mux_dout[4].OUTPUTSELECT
sclr => mux_dout[3].OUTPUTSELECT
sclr => mux_dout[2].OUTPUTSELECT
sclr => mux_dout[1].OUTPUTSELECT
sclr => mux_dout[0].OUTPUTSELECT
ce => mux_dout~1.OUTPUTSELECT
ce => mux_dout~2.OUTPUTSELECT
ce => mux_dout~3.OUTPUTSELECT
ce => mux_dout~4.OUTPUTSELECT
ce => mux_dout~5.OUTPUTSELECT
ce => mux_dout~6.OUTPUTSELECT
ce => mux_dout~7.OUTPUTSELECT
ce => mux_dout~8.OUTPUTSELECT
word_lngth => mux_dout~0.OUTPUTSELECT
d[0] => mux_dout~8.DATAB
d[1] => mux_dout~7.DATAB
d[2] => mux_dout~6.DATAB
d[3] => mux_dout~5.DATAB
d[4] => mux_dout~4.DATAB
d[5] => mux_dout~3.DATAB
d[6] => mux_dout~2.DATAB
d[7] => mux_dout~0.DATAB
q[0] <= int_dout[0].DB_MAX_OUTPUT_PORT_TYPE
q[1] <= int_dout[1].DB_MAX_OUTPUT_PORT_TYPE
q[2] <= int_dout[2].DB_MAX_OUTPUT_PORT_TYPE
q[3] <= int_dout[3].DB_MAX_OUTPUT_PORT_TYPE
q[4] <= int_dout[4].DB_MAX_OUTPUT_PORT_TYPE
q[5] <= int_dout[5].DB_MAX_OUTPUT_PORT_TYPE
q[6] <= int_dout[6].DB_MAX_OUTPUT_PORT_TYPE
q[7] <= int_dout[7].DB_MAX_OUTPUT_PORT_TYPE


|A6850|stsrg:u4
rxclk => rx_stsrg:u2.clk
txclk => tx_stsrg:u1.clk
reset => rx_stsrg:u2.clr
reset => tx_stsrg:u1.clr
mc => rx_stsrg:u2.sclr
mc => tx_stsrg:u1.sclr
txdat_wr => tx_stsrg:u1.txdat_wr
tx_tran_en => tx_stsrg:u1.tran_en
cts_in => tx_stsrg:u1.cts_in
tx_irq_en => tx_stsrg:u1.tx_irq_en
dcd_in => rx_stsrg:u2.dcd_in
fe_in => rx_stsrg:u2.fe_in
ovr_in => rx_stsrg:u2.ovr_in
pe_in => rx_stsrg:u2.pe_in
rxdat_read => rx_stsrg:u2.rxdat_read
sts_read => rx_stsrg:u2.sts_read
rx_irq_en => rx_stsrg:u2.rx_irq_en
rx_tran_en => rx_stsrg:u2.tran_en
irq_n <= irq~0.DB_MAX_OUTPUT_PORT_TYPE
sts_reg[0] <= rx_stsrg:u2.rdrf_out
sts_reg[1] <= tx_stsrg:u1.tdre_out
sts_reg[2] <= rx_stsrg:u2.dcd_out
sts_reg[3] <= tx_stsrg:u1.cts_out
sts_reg[4] <= rx_stsrg:u2.fe_out
sts_reg[5] <= rx_stsrg:u2.ovr_out
sts_reg[6] <= rx_stsrg:u2.pe_out
sts_reg[7] <= irq~0.DB_MAX_OUTPUT_PORT_TYPE


|A6850|stsrg:u4|tx_stsrg:u1
clk => int_dout[1].CLK
clk => int_dout[0].CLK
clk => int_dout[2].CLK
clr => int_dout[1].ACLR
clr => int_dout[0].ACLR
clr => int_dout[2].PRESET
sclr => local_tdre.OUTPUTSELECT
txdat_wr => local_tdre~1.OUTPUTSELECT
tran_en => local_tdre~0.OUTPUTSELECT
cts_in => local_tdre~2.OUTPUTSELECT
cts_in => int_dout[1].DATAIN
tx_irq_en => local_irq.OUTPUTSELECT
tdre_out <= int_dout[2].DB_MAX_OUTPUT_PORT_TYPE
cts_out <= int_dout[1].DB_MAX_OUTPUT_PORT_TYPE
tx_irq_out <= int_dout[0].DB_MAX_OUTPUT_PORT_TYPE


|A6850|stsrg:u4|rx_stsrg:u2
clk => int_dout[4].CLK
clk => int_dout[3].CLK
clk => int_dout[2].CLK
clk => int_dout[1].CLK
clk => int_dout[0].CLK
clk => sts_done.CLK
clk => data_done.CLK
clk => int_dout[5].CLK
clr => int_dout[4].ACLR
clr => int_dout[3].ACLR
clr => int_dout[2].ACLR
clr => int_dout[1].ACLR
clr => int_dout[0].ACLR
clr => sts_done.ACLR
clr => data_done.ACLR
clr => int_dout[5].ACLR
sclr => local_dcd.OUTPUTSELECT
sclr => local_data_done.OUTPUTSELECT
sclr => local_sts_done.OUTPUTSELECT
sclr => local_rdrf.OUTPUTSELECT
sclr => local_fe.OUTPUTSELECT
sclr => local_ovr.OUTPUTSELECT
sclr => local_pe.OUTPUTSELECT
dcd_in => local_dcd~0.DATAB
dcd_in => local_dcd~2.DATAA
dcd_in => local_dcd.DATAB
fe_in => local_fe~0.DATAB
ovr_in => local_ovr~0.DATAB
pe_in => local_pe~0.DATAB
rxdat_read => local_rdrf~1.OUTPUTSELECT
rxdat_read => local_data_done~0.DATAA
sts_read => local_sts_done~0.DATAA
rx_irq_en => local_irq.OUTPUTSELECT
tran_en => local_rdrf~0.OUTPUTSELECT
tran_en => local_fe~0.OUTPUTSELECT
tran_en => local_ovr~0.OUTPUTSELECT
tran_en => local_pe~0.OUTPUTSELECT
rdrf_out <= int_dout[5].DB_MAX_OUTPUT_PORT_TYPE
dcd_out <= int_dout[4].DB_MAX_OUTPUT_PORT_TYPE
fe_out <= int_dout[3].DB_MAX_OUTPUT_PORT_TYPE
ovr_out <= int_dout[2].DB_MAX_OUTPUT_PORT_TYPE
pe_out <= int_dout[1].DB_MAX_OUTPUT_PORT_TYPE
rx_irq_out <= int_dout[0].DB_MAX_OUTPUT_PORT_TYPE


|A6850|rxshftrg:u5
clock => data[7].CLK
clock => data[6].CLK
clock => data[5].CLK
clock => data[4].CLK
clock => data[3].CLK
clock => data[2].CLK
clock => data[1].CLK
clock => data[0].CLK
clock => data[8].CLK
reset => data[7].ACLR
reset => data[6].ACLR
reset => data[5].ACLR
reset => data[4].ACLR
reset => data[3].ACLR
reset => data[2].ACLR
reset => data[1].ACLR
reset => data[0].ACLR
reset => data[8].ACLR
sclr => next_data[8].OUTPUTSELECT
sclr => next_data[7].OUTPUTSELECT
sclr => next_data[6].OUTPUTSELECT
sclr => next_data[5].OUTPUTSELECT
sclr => next_data[4].OUTPUTSELECT
sclr => next_data[3].OUTPUTSELECT
sclr => next_data[2].OUTPUTSELECT
sclr => next_data[1].OUTPUTSELECT
sclr => next_data[0].OUTPUTSELECT
shift_en => next_data~0.OUTPUTSELECT
shift_en => next_data~1.OUTPUTSELECT
shift_en => next_data~2.OUTPUTSELECT
shift_en => next_data~3.OUTPUTSELECT
shift_en => next_data~4.OUTPUTSELECT
shift_en => next_data~5.OUTPUTSELECT
shift_en => next_data~6.OUTPUTSELECT
shift_en => next_data~7.OUTPUTSELECT
shift_en => next_data~8.OUTPUTSELECT
word_lngth => par_out~8.IN1
word_lngth => par_out~17.IN1
word_lngth => par_out~0.IN1
parity_en => par_out~0.IN0
parity_en => par_out~17.IN0
parity_en => par_out~8.IN0
sli => next_data~0.DATAB
parity <= data[8].DB_MAX_OUTPUT_PORT_TYPE
par_out[0] <= par_out~25.DB_MAX_OUTPUT_PORT_TYPE
par_out[1] <= par_out~24.DB_MAX_OUTPUT_PORT_TYPE
par_out[2] <= par_out~23.DB_MAX_OUTPUT_PORT_TYPE
par_out[3] <= par_out~22.DB_MAX_OUTPUT_PORT_TYPE
par_out[4] <= par_out~21.DB_MAX_OUTPUT_PORT_TYPE
par_out[5] <= par_out~20.DB_MAX_OUTPUT_PORT_TYPE
par_out[6] <= par_out~19.DB_MAX_OUTPUT_PORT_TYPE
par_out[7] <= par_out~18.DB_MAX_OUTPUT_PORT_TYPE


|A6850|cntl_reg:u6
clk => int_dout[6].CLK
clk => int_dout[5].CLK
clk => int_dout[4].CLK
clk => int_dout[3].CLK
clk => int_dout[2].CLK
clk => int_dout[1].CLK
clk => int_dout[0].CLK
clk => int_dout[7].CLK
clr => int_dout[6].ACLR
clr => int_dout[5].ACLR
clr => int_dout[4].ACLR
clr => int_dout[3].ACLR
clr => int_dout[2].ACLR
clr => int_dout[1].ACLR
clr => int_dout[0].ACLR
clr => int_dout[7].ACLR
ce => int_dout[6].ENA
ce => int_dout[5].ENA
ce => int_dout[4].ENA