a6850.tan.qmsg

本文件是altera公司fpga的ip核

{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "rxclk " "Info: Assuming node \"rxclk\" is an undefined clock" {  } { { "A6850.vhd" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/A6850.vhd" 42 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "rxclk" } } } }  } 0} { "Info" "ITAN_NODE_MAP_TO_CLK" "txclk " "Info: Assuming node \"txclk\" is an undefined clock" {  } { { "A6850.vhd" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/A6850.vhd" 41 -1 0 } } { "d:/altera/quartus50/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus50/bin/Assignment Editor.qase" 1 { { 0 "txclk" } } } }  } 0}  } {  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "rxclk register rxcntl:u1\|rxcntlsm:u1\|state.overrun register rxcntl:u1\|rxcount:u3\|int_dout\[4\] 158.38 MHz 6.314 ns Internal " "Info: Clock \"rxclk\" has Internal fmax of 158.38 MHz between source register \"rxcntl:u1\|rxcntlsm:u1\|state.overrun\" and destination register \"rxcntl:u1\|rxcount:u3\|int_dout\[4\]\" (period= 6.314 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "6.053 ns + Longest register register " "Info: + Longest register to register delay is 6.053 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns rxcntl:u1\|rxcntlsm:u1\|state.overrun 1 REG LC_X19_Y6_N8 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X19_Y6_N8; Fanout = 3; REG Node = 'rxcntl:u1\|rxcntlsm:u1\|state.overrun'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "" { rxcntl:u1|rxcntlsm:u1|state.overrun } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.506 ns) + CELL(0.442 ns) 0.948 ns rxcntl:u1\|rxcntlsm:u1\|cnt_en~70 2 COMB LC_X19_Y6_N7 3 " "Info: 2: + IC(0.506 ns) + CELL(0.442 ns) = 0.948 ns; Loc. = LC_X19_Y6_N7; Fanout = 3; COMB Node = 'rxcntl:u1\|rxcntlsm:u1\|cnt_en~70'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "0.948 ns" { rxcntl:u1|rxcntlsm:u1|state.overrun rxcntl:u1|rxcntlsm:u1|cnt_en~70 } "NODE_NAME" } "" } } { "RXCNTLSM.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/RXCNTLSM.VHD" 50 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.454 ns) + CELL(0.292 ns) 1.694 ns rxcntl:u1\|rxcntlsm:u1\|cnt_en~73 3 COMB LC_X19_Y6_N2 13 " "Info: 3: + IC(0.454 ns) + CELL(0.292 ns) = 1.694 ns; Loc. = LC_X19_Y6_N2; Fanout = 13; COMB Node = 'rxcntl:u1\|rxcntlsm:u1\|cnt_en~73'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "0.746 ns" { rxcntl:u1|rxcntlsm:u1|cnt_en~70 rxcntl:u1|rxcntlsm:u1|cnt_en~73 } "NODE_NAME" } "" } } { "RXCNTLSM.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/RXCNTLSM.VHD" 50 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.188 ns) + CELL(0.292 ns) 3.174 ns rxcntl:u1\|rxcntlsm:u1\|Select~448 4 COMB LC_X17_Y6_N8 1 " "Info: 4: + IC(1.188 ns) + CELL(0.292 ns) = 3.174 ns; Loc. = LC_X17_Y6_N8; Fanout = 1; COMB Node = 'rxcntl:u1\|rxcntlsm:u1\|Select~448'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "1.480 ns" { rxcntl:u1|rxcntlsm:u1|cnt_en~73 rxcntl:u1|rxcntlsm:u1|Select~448 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.718 ns) + CELL(0.292 ns) 4.184 ns rxcntl:u1\|rxcntlsm:u1\|clr_cnt~175 5 COMB LC_X18_Y6_N7 1 " "Info: 5: + IC(0.718 ns) + CELL(0.292 ns) = 4.184 ns; Loc. = LC_X18_Y6_N7; Fanout = 1; COMB Node = 'rxcntl:u1\|rxcntlsm:u1\|clr_cnt~175'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "1.010 ns" { rxcntl:u1|rxcntlsm:u1|Select~448 rxcntl:u1|rxcntlsm:u1|clr_cnt~175 } "NODE_NAME" } "" } } { "RXCNTLSM.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/RXCNTLSM.VHD" 51 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.182 ns) + CELL(0.114 ns) 4.480 ns rxcntl:u1\|rxcntlsm:u1\|clr_cnt~176 6 COMB LC_X18_Y6_N8 6 " "Info: 6: + IC(0.182 ns) + CELL(0.114 ns) = 4.480 ns; Loc. = LC_X18_Y6_N8; Fanout = 6; COMB Node = 'rxcntl:u1\|rxcntlsm:u1\|clr_cnt~176'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "0.296 ns" { rxcntl:u1|rxcntlsm:u1|clr_cnt~175 rxcntl:u1|rxcntlsm:u1|clr_cnt~176 } "NODE_NAME" } "" } } { "RXCNTLSM.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/RXCNTLSM.VHD" 51 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.461 ns) + CELL(1.112 ns) 6.053 ns rxcntl:u1\|rxcount:u3\|int_dout\[4\] 7 REG LC_X18_Y6_N5 5 " "Info: 7: + IC(0.461 ns) + CELL(1.112 ns) = 6.053 ns; Loc. = LC_X18_Y6_N5; Fanout = 5; REG Node = 'rxcntl:u1\|rxcount:u3\|int_dout\[4\]'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "1.573 ns" { rxcntl:u1|rxcntlsm:u1|clr_cnt~176 rxcntl:u1|rxcount:u3|int_dout[4] } "NODE_NAME" } "" } } { "RXCOUNT.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/RXCOUNT.VHD" 63 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.544 ns 42.03 % " "Info: Total cell delay = 2.544 ns ( 42.03 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "3.509 ns 57.97 % " "Info: Total interconnect delay = 3.509 ns ( 57.97 % )" {  } {  } 0}  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "6.053 ns" { rxcntl:u1|rxcntlsm:u1|state.overrun rxcntl:u1|rxcntlsm:u1|cnt_en~70 rxcntl:u1|rxcntlsm:u1|cnt_en~73 rxcntl:u1|rxcntlsm:u1|Select~448 rxcntl:u1|rxcntlsm:u1|clr_cnt~175 rxcntl:u1|rxcntlsm:u1|clr_cnt~176 rxcntl:u1|rxcount:u3|int_dout[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "6.053 ns" { rxcntl:u1|rxcntlsm:u1|state.overrun rxcntl:u1|rxcntlsm:u1|cnt_en~70 rxcntl:u1|rxcntlsm:u1|cnt_en~73 rxcntl:u1|rxcntlsm:u1|Select~448 rxcntl:u1|rxcntlsm:u1|clr_cnt~175 rxcntl:u1|rxcntlsm:u1|clr_cnt~176 rxcntl:u1|rxcount:u3|int_dout[4] } { 0.000ns 0.506ns 0.454ns 1.188ns 0.718ns 0.182ns 0.461ns } { 0.000ns 0.442ns 0.292ns 0.292ns 0.292ns 0.114ns 1.112ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "rxclk destination 2.781 ns + Shortest register " "Info: + Shortest clock path from clock \"rxclk\" to destination register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns rxclk 1 CLK PIN_66 55 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_66; Fanout = 55; CLK Node = 'rxclk'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "" { rxclk } "NODE_NAME" } "" } } { "A6850.vhd" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/A6850.vhd" 42 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns rxcntl:u1\|rxcount:u3\|int_dout\[4\] 2 REG LC_X18_Y6_N5 5 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X18_Y6_N5; Fanout = 5; REG Node = 'rxcntl:u1\|rxcount:u3\|int_dout\[4\]'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "1.312 ns" { rxclk rxcntl:u1|rxcount:u3|int_dout[4] } "NODE_NAME" } "" } } { "RXCOUNT.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/RXCOUNT.VHD" 63 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 78.39 % " "Info: Total cell delay = 2.180 ns ( 78.39 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns 21.61 % " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" {  } {  } 0}  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "2.781 ns" { rxclk rxcntl:u1|rxcount:u3|int_dout[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { rxclk rxclk~out0 rxcntl:u1|rxcount:u3|int_dout[4] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "rxclk source 2.781 ns - Longest register " "Info: - Longest clock path from clock \"rxclk\" to source register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns rxclk 1 CLK PIN_66 55 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_66; Fanout = 55; CLK Node = 'rxclk'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "" { rxclk } "NODE_NAME" } "" } } { "A6850.vhd" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/A6850.vhd" 42 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns rxcntl:u1\|rxcntlsm:u1\|state.overrun 2 REG LC_X19_Y6_N8 3 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X19_Y6_N8; Fanout = 3; REG Node = 'rxcntl:u1\|rxcntlsm:u1\|state.overrun'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "1.312 ns" { rxclk rxcntl:u1|rxcntlsm:u1|state.overrun } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 78.39 % " "Info: Total cell delay = 2.180 ns ( 78.39 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns 21.61 % " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" {  } {  } 0}  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "2.781 ns" { rxclk rxcntl:u1|rxcntlsm:u1|state.overrun } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { rxclk rxclk~out0 rxcntl:u1|rxcntlsm:u1|state.overrun } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "2.781 ns" { rxclk rxcntl:u1|rxcount:u3|int_dout[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { rxclk rxclk~out0 rxcntl:u1|rxcount:u3|int_dout[4] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "2.781 ns" { rxclk rxcntl:u1|rxcntlsm:u1|state.overrun } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { rxclk rxclk~out0 rxcntl:u1|rxcntlsm:u1|state.overrun } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } {  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "RXCOUNT.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/RXCOUNT.VHD" 63 -1 0 } }  } 0}  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "6.053 ns" { rxcntl:u1|rxcntlsm:u1|state.overrun rxcntl:u1|rxcntlsm:u1|cnt_en~70 rxcntl:u1|rxcntlsm:u1|cnt_en~73 rxcntl:u1|rxcntlsm:u1|Select~448 rxcntl:u1|rxcntlsm:u1|clr_cnt~175 rxcntl:u1|rxcntlsm:u1|clr_cnt~176 rxcntl:u1|rxcount:u3|int_dout[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "6.053 ns" { rxcntl:u1|rxcntlsm:u1|state.overrun rxcntl:u1|rxcntlsm:u1|cnt_en~70 rxcntl:u1|rxcntlsm:u1|cnt_en~73 rxcntl:u1|rxcntlsm:u1|Select~448 rxcntl:u1|rxcntlsm:u1|clr_cnt~175 rxcntl:u1|rxcntlsm:u1|clr_cnt~176 rxcntl:u1|rxcount:u3|int_dout[4] } { 0.000ns 0.506ns 0.454ns 1.188ns 0.718ns 0.182ns 0.461ns } { 0.000ns 0.442ns 0.292ns 0.292ns 0.292ns 0.114ns 1.112ns } } } { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "2.781 ns" { rxclk rxcntl:u1|rxcount:u3|int_dout[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { rxclk rxclk~out0 rxcntl:u1|rxcount:u3|int_dout[4] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "2.781 ns" { rxclk rxcntl:u1|rxcntlsm:u1|state.overrun } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { rxclk rxclk~out0 rxcntl:u1|rxcntlsm:u1|state.overrun } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "txclk register cntl_reg:u6\|int_dout\[1\] register tcntl:u8\|txclkcnt:u3\|int_dout\[2\] 160.03 MHz 6.249 ns Internal " "Info: Clock \"txclk\" has Internal fmax of 160.03 MHz between source register \"cntl_reg:u6\|int_dout\[1\]\" and destination register \"tcntl:u8\|txclkcnt:u3\|int_dout\[2\]\" (period= 6.249 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.988 ns + Longest register register " "Info: + Longest register to register delay is 5.988 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns cntl_reg:u6\|int_dout\[1\] 1 REG LC_X17_Y8_N5 42 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X17_Y8_N5; Fanout = 42; REG Node = 'cntl_reg:u6\|int_dout\[1\]'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "" { cntl_reg:u6|int_dout[1] } "NODE_NAME" } "" } } { "CNTL_REG.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/CNTL_REG.VHD" 66 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.952 ns) + CELL(0.442 ns) 1.394 ns cntl_reg:u6\|mr~0 2 COMB LC_X18_Y8_N7 43 " "Info: 2: + IC(0.952 ns) + CELL(0.442 ns) = 1.394 ns; Loc. = LC_X18_Y8_N7; Fanout = 43; COMB Node = 'cntl_reg:u6\|mr~0'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "1.394 ns" { cntl_reg:u6|int_dout[1] cntl_reg:u6|mr~0 } "NODE_NAME" } "" } } { "CNTL_REG.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/CNTL_REG.VHD" 45 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.373 ns) + CELL(0.114 ns) 2.881 ns tcntl:u8\|txclkcnt:u3\|mux_dout\[6\]~215 3 COMB LC_X17_Y7_N3 2 " "Info: 3: + IC(1.373 ns) + CELL(0.114 ns) = 2.881 ns; Loc. = LC_X17_Y7_N3; Fanout = 2; COMB Node = 'tcntl:u8\|txclkcnt:u3\|mux_dout\[6\]~215'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "1.487 ns" { cntl_reg:u6|mr~0 tcntl:u8|txclkcnt:u3|mux_dout[6]~215 } "NODE_NAME" } "" } } { "TXCLKCNT.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/TXCLKCNT.VHD" 60 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.225 ns) + CELL(0.292 ns) 4.398 ns tcntl:u8\|txclkcnt:u3\|mux_dout\[6\]~216 4 COMB LC_X16_Y8_N0 7 " "Info: 4: + IC(1.225 ns) + CELL(0.292 ns) = 4.398 ns; Loc. = LC_X16_Y8_N0; Fanout = 7; COMB Node = 'tcntl:u8\|txclkcnt:u3\|mux_dout\[6\]~216'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "1.517 ns" { tcntl:u8|txclkcnt:u3|mux_dout[6]~215 tcntl:u8|txclkcnt:u3|mux_dout[6]~216 } "NODE_NAME" } "" } } { "TXCLKCNT.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/TXCLKCNT.VHD" 60 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.478 ns) + CELL(1.112 ns) 5.988 ns tcntl:u8\|txclkcnt:u3\|int_dout\[2\] 5 REG LC_X16_Y8_N3 4 " "Info: 5: + IC(0.478 ns) + CELL(1.112 ns) = 5.988 ns; Loc. = LC_X16_Y8_N3; Fanout = 4; REG Node = 'tcntl:u8\|txclkcnt:u3\|int_dout\[2\]'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "1.590 ns" { tcntl:u8|txclkcnt:u3|mux_dout[6]~216 tcntl:u8|txclkcnt:u3|int_dout[2] } "NODE_NAME" } "" } } { "TXCLKCNT.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/TXCLKCNT.VHD" 61 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.960 ns 32.73 % " "Info: Total cell delay = 1.960 ns ( 32.73 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "4.028 ns 67.27 % " "Info: Total interconnect delay = 4.028 ns ( 67.27 % )" {  } {  } 0}  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "5.988 ns" { cntl_reg:u6|int_dout[1] cntl_reg:u6|mr~0 tcntl:u8|txclkcnt:u3|mux_dout[6]~215 tcntl:u8|txclkcnt:u3|mux_dout[6]~216 tcntl:u8|txclkcnt:u3|int_dout[2] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.988 ns" { cntl_reg:u6|int_dout[1] cntl_reg:u6|mr~0 tcntl:u8|txclkcnt:u3|mux_dout[6]~215 tcntl:u8|txclkcnt:u3|mux_dout[6]~216 tcntl:u8|txclkcnt:u3|int_dout[2] } { 0.000ns 0.952ns 1.373ns 1.225ns 0.478ns } { 0.000ns 0.442ns 0.114ns 0.292ns 1.112ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "txclk destination 2.781 ns + Shortest register " "Info: + Shortest clock path from clock \"txclk\" to destination register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns txclk 1 CLK PIN_10 56 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_10; Fanout = 56; CLK Node = 'txclk'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "" { txclk } "NODE_NAME" } "" } } { "A6850.vhd" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/A6850.vhd" 41 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns tcntl:u8\|txclkcnt:u3\|int_dout\[2\] 2 REG LC_X16_Y8_N3 4 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X16_Y8_N3; Fanout = 4; REG Node = 'tcntl:u8\|txclkcnt:u3\|int_dout\[2\]'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "1.312 ns" { txclk tcntl:u8|txclkcnt:u3|int_dout[2] } "NODE_NAME" } "" } } { "TXCLKCNT.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/TXCLKCNT.VHD" 61 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 78.39 % " "Info: Total cell delay = 2.180 ns ( 78.39 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns 21.61 % " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" {  } {  } 0}  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "2.781 ns" { txclk tcntl:u8|txclkcnt:u3|int_dout[2] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { txclk txclk~out0 tcntl:u8|txclkcnt:u3|int_dout[2] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "txclk source 2.781 ns - Longest register " "Info: - Longest clock path from clock \"txclk\" to source register is 2.781 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.469 ns) 1.469 ns txclk 1 CLK PIN_10 56 " "Info: 1: + IC(0.000 ns) + CELL(1.469 ns) = 1.469 ns; Loc. = PIN_10; Fanout = 56; CLK Node = 'txclk'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "" { txclk } "NODE_NAME" } "" } } { "A6850.vhd" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/A6850.vhd" 41 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.601 ns) + CELL(0.711 ns) 2.781 ns cntl_reg:u6\|int_dout\[1\] 2 REG LC_X17_Y8_N5 42 " "Info: 2: + IC(0.601 ns) + CELL(0.711 ns) = 2.781 ns; Loc. = LC_X17_Y8_N5; Fanout = 42; REG Node = 'cntl_reg:u6\|int_dout\[1\]'" {  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "1.312 ns" { txclk cntl_reg:u6|int_dout[1] } "NODE_NAME" } "" } } { "CNTL_REG.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/CNTL_REG.VHD" 66 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.180 ns 78.39 % " "Info: Total cell delay = 2.180 ns ( 78.39 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "0.601 ns 21.61 % " "Info: Total interconnect delay = 0.601 ns ( 21.61 % )" {  } {  } 0}  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "2.781 ns" { txclk cntl_reg:u6|int_dout[1] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { txclk txclk~out0 cntl_reg:u6|int_dout[1] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "2.781 ns" { txclk tcntl:u8|txclkcnt:u3|int_dout[2] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { txclk txclk~out0 tcntl:u8|txclkcnt:u3|int_dout[2] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "2.781 ns" { txclk cntl_reg:u6|int_dout[1] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { txclk txclk~out0 cntl_reg:u6|int_dout[1] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.224 ns + " "Info: + Micro clock to output delay of source is 0.224 ns" {  } { { "CNTL_REG.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/CNTL_REG.VHD" 66 -1 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.037 ns + " "Info: + Micro setup delay of destination is 0.037 ns" {  } { { "TXCLKCNT.VHD" "" { Text "E:/genggh/001_VOB/WXY00/doc/6850_OSED/TXCLKCNT.VHD" 61 -1 0 } }  } 0}  } { { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "5.988 ns" { cntl_reg:u6|int_dout[1] cntl_reg:u6|mr~0 tcntl:u8|txclkcnt:u3|mux_dout[6]~215 tcntl:u8|txclkcnt:u3|mux_dout[6]~216 tcntl:u8|txclkcnt:u3|int_dout[2] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.988 ns" { cntl_reg:u6|int_dout[1] cntl_reg:u6|mr~0 tcntl:u8|txclkcnt:u3|mux_dout[6]~215 tcntl:u8|txclkcnt:u3|mux_dout[6]~216 tcntl:u8|txclkcnt:u3|int_dout[2] } { 0.000ns 0.952ns 1.373ns 1.225ns 0.478ns } { 0.000ns 0.442ns 0.114ns 0.292ns 1.112ns } } } { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "2.781 ns" { txclk tcntl:u8|txclkcnt:u3|int_dout[2] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { txclk txclk~out0 tcntl:u8|txclkcnt:u3|int_dout[2] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } } { "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" "" { Report "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850_cmp.qrpt" Compiler "A6850" "UNKNOWN" "V1" "E:/genggh/001_VOB/WXY00/doc/6850_OSED/db/A6850.quartus_db" { Floorplan "E:/genggh/001_VOB/WXY00/doc/6850_OSED/" "" "2.781 ns" { txclk cntl_reg:u6|int_dout[1] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.781 ns" { txclk txclk~out0 cntl_reg:u6|int_dout[1] } { 0.000ns 0.000ns 0.601ns } { 0.000ns 1.469ns 0.711ns } } }  } 0}