📄 d_bcd.rpt
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(unused) 0 0 0 5 FB8_13 (b)
(unused) 0 0 0 5 FB8_14 71 I/O
(unused) 0 0 0 5 FB8_15 72 I/O
(unused) 0 0 0 5 FB8_16 (b)
(unused) 0 0 0 5 FB8_17 73 I/O
(unused) 0 0 0 5 FB8_18 (b)
Signals Used by Logic in Function Block
1: cs_sw8 3: p_sw2 5: p_sw4
2: p_sw1 4: p_sw3
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
led2_out<3> XXXXX................................... 5 5
led2_out<6> XXXXX................................... 5 5
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
;;-----------------------------------------------------------------;;
; Implemented Equations.
!led1_out<0> = !(cs_sw8) & p_sw2 & !(p_sw4)
# !(cs_sw8) & p_sw3 & p_sw1 & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & !(p_sw1)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & p_sw4;
!led2_out<0> = !(cs_sw8) & p_sw2 & !(p_sw4)
# !(cs_sw8) & p_sw3 & p_sw1 & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & !(p_sw1)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & p_sw4;
!led3_out<0> = !(cs_sw8) & p_sw2 & !(p_sw4)
# !(cs_sw8) & p_sw3 & p_sw1 & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & !(p_sw1)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & p_sw4;
!led1_out<1> = !(cs_sw8) & !(p_sw3) & !(p_sw2)
# !(cs_sw8) & !(p_sw3) & !(p_sw4)
# !(cs_sw8) & p_sw2 & p_sw1 & !(p_sw4)
# !(cs_sw8) & !(p_sw2) & !(p_sw1) & !(p_sw4);
!led2_out<1> = !(cs_sw8) & !(p_sw3) & !(p_sw2)
# !(cs_sw8) & !(p_sw3) & !(p_sw4)
# !(cs_sw8) & p_sw2 & p_sw1 & !(p_sw4)
# !(cs_sw8) & !(p_sw2) & !(p_sw1) & !(p_sw4);
!led3_out<1> = !(cs_sw8) & !(p_sw3) & !(p_sw2)
# !(cs_sw8) & !(p_sw3) & !(p_sw4)
# !(cs_sw8) & p_sw2 & p_sw1 & !(p_sw4)
# !(cs_sw8) & !(p_sw2) & !(p_sw1) & !(p_sw4);
!led1_out<2> = !(cs_sw8) & p_sw3 & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2)
# !(cs_sw8) & p_sw1 & !(p_sw4);
!led2_out<2> = !(cs_sw8) & p_sw3 & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2)
# !(cs_sw8) & p_sw1 & !(p_sw4);
!led3_out<2> = !(cs_sw8) & p_sw3 & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2)
# !(cs_sw8) & p_sw1 & !(p_sw4);
!led1_out<3> = !(cs_sw8) & !(p_sw3) & p_sw2 & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & !(p_sw1)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & p_sw4
# !(cs_sw8) & p_sw2 & !(p_sw1) & !(p_sw4)
# !(cs_sw8) & p_sw3 & !(p_sw2) & p_sw1 & !(p_sw4);
!led2_out<3> = !(cs_sw8) & !(p_sw3) & p_sw2 & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & !(p_sw1)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & p_sw4
# !(cs_sw8) & p_sw2 & !(p_sw1) & !(p_sw4)
# !(cs_sw8) & p_sw3 & !(p_sw2) & p_sw1 & !(p_sw4);
!led3_out<3> = !(cs_sw8) & !(p_sw3) & p_sw2 & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & !(p_sw1)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & p_sw4
# !(cs_sw8) & p_sw2 & !(p_sw1) & !(p_sw4)
# !(cs_sw8) & p_sw3 & !(p_sw2) & p_sw1 & !(p_sw4);
!led1_out<4> = !(cs_sw8) & !(p_sw3) & !(p_sw2) & !(p_sw1)
# !(cs_sw8) & p_sw2 & !(p_sw1) & !(p_sw4);
!led2_out<4> = !(cs_sw8) & !(p_sw3) & !(p_sw2) & !(p_sw1)
# !(cs_sw8) & p_sw2 & !(p_sw1) & !(p_sw4);
!led3_out<4> = !(cs_sw8) & !(p_sw3) & !(p_sw2) & !(p_sw1)
# !(cs_sw8) & p_sw2 & !(p_sw1) & !(p_sw4);
!led1_out<5> = !(cs_sw8) & p_sw3 & !(p_sw2) & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & p_sw2 & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & p_sw4
# !(cs_sw8) & p_sw2 & !(p_sw1) & !(p_sw4);
!led2_out<5> = !(cs_sw8) & p_sw3 & !(p_sw2) & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & p_sw2 & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & p_sw4
# !(cs_sw8) & p_sw2 & !(p_sw1) & !(p_sw4);
!led3_out<5> = !(cs_sw8) & p_sw3 & !(p_sw2) & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & p_sw2 & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & p_sw4
# !(cs_sw8) & p_sw2 & !(p_sw1) & !(p_sw4);
!led1_out<6> = !(cs_sw8) & p_sw3 & !(p_sw2) & !(p_sw4)
# !(cs_sw8) & p_sw3 & !(p_sw1) & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & p_sw4
# !(cs_sw8) & !(p_sw2) & !(p_sw1) & !(p_sw4);
!led2_out<6> = !(cs_sw8) & p_sw3 & !(p_sw2) & !(p_sw4)
# !(cs_sw8) & p_sw3 & !(p_sw1) & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & p_sw4
# !(cs_sw8) & !(p_sw2) & !(p_sw1) & !(p_sw4);
!led3_out<6> = !(cs_sw8) & p_sw3 & !(p_sw2) & !(p_sw4)
# !(cs_sw8) & p_sw3 & !(p_sw1) & !(p_sw4)
# !(cs_sw8) & !(p_sw3) & !(p_sw2) & p_sw4
# !(cs_sw8) & !(p_sw2) & !(p_sw1) & !(p_sw4);
**************************** Device Pin Out ****************************
Device : XC95144XL-5-TQ100
l l l l l
e e e e e
d d d d d
3 3 3 1 1
_ _ _ _ _
o c o o o o
p u s u u u p u
_ t _ t t t _ t
G T V T s T < T s < T T V < T T G T T T < T T s <
N I C I w I 2 I w 6 I I C 5 I I N D I I 6 I I w 3
D E C E 2 E > E 8 > E E C > E E D O E E > E E 1 >
--------------------------------------------------
/100 98 96 94 92 90 88 86 84 82 80 78 76 \
| 99 97 95 93 91 89 87 85 83 81 79 77 |
TIE | 1 75 | GND
TIE | 2 74 | TIE
TIE | 3 73 | TIE
TIE | 4 72 | TIE
VCC | 5 71 | TIE
led1_out<4> | 6 70 | TIE
p_sw3 | 7 69 | GND
led2_out<4> | 8 68 | led2_out<6>
TIE | 9 67 | TIE
led3_out<4> | 10 66 | TIE
led3_out<1> | 11 65 | TIE
TIE | 12 64 | led2_out<3>
TIE | 13 XC95144XL-5-TQ100 63 | TIE
led1_out<5> | 14 62 | GND
TIE | 15 61 | TIE
TIE | 16 60 | TIE
led2_out<5> | 17 59 | TIE
TIE | 18 58 | TIE
TIE | 19 57 | VCC
TIE | 20 56 | led3_out<0>
GND | 21 55 | TIE
TIE | 22 54 | TIE
TIE | 23 53 | TIE
led1_out<0> | 24 52 | led3_out<3>
p_sw4 | 25 51 | VCC
| 27 29 31 33 35 37 39 41 43 45 47 49 |
\26 28 30 32 34 36 38 40 42 44 46 48 50 /
--------------------------------------------------
V T T l T G T l T l T T V l T T l T G T T T T T T
C I I e I N I e I e I I C e I I e I N D I M C I I
C E E d E D E d E d E E C d E E d E D I E S K E E
1 1 2 2 2
_ _ _ _ _
o o o o o
u u u u u
t t t t t
< < < < <
1 2 0 1 2
> > > > >
Legend : NC = Not Connected, unbonded pin
PGND = Unused I/O configured as additional Ground pin
TIE = Unused I/O floating -- must tie to VCC, GND or other signal
VCC = Dedicated Power Pin
GND = Dedicated Ground Pin
TDI = Test Data In, JTAG pin
TDO = Test Data Out, JTAG pin
TCK = Test Clock, JTAG pin
TMS = Test Mode Select, JTAG pin
PE = Port Enable pin
PROHIBITED = User reserved pin
**************************** Compiler Options ****************************
Following is a list of all global compiler options used by the fitter run.
Device(s) Specified : XC95144XL-5-TQ100
Optimization Method : SPEED
Multi-Level Logic Optimization : ON
Ignore Timing Specifications : OFF
Default Register Power Up Value : LOW
Slew Rate : FAST
Keep User Location Constraints : ON
What-You-See-Is-What-You-Get : OFF
Exhaustive Fitting : OFF
Keep Unused Inputs : OFF
Power Mode : STD
Set Unused I/O Pin Termination : FLOAT
Set I/O Pin Termination : KEEPER
Global Clock Optimization : ON
Global Set/Reset Optimization : ON
Global Ouput Enable Optimization : ON
Input Limit : 54
Pterm Limit : 25
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