📄 d_bcd.rpt
字号:
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB4 ***********************************
Number of function block inputs used/remaining: 5/49
Number of signals used by logic mapping into function block: 5
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 0 5 FB4_1 (b)
led3_out<5> 4 0 0 1 FB4_2 STD 87 I/O O
(unused) 0 0 0 5 FB4_3 (b)
(unused) 0 0 0 5 FB4_4 (b)
(unused) 0 0 0 5 FB4_5 89 I/O
(unused) 0 0 0 5 FB4_6 90 I/O
(unused) 0 0 0 5 FB4_7 (b)
led3_out<6> 4 0 0 1 FB4_8 STD 91 I/O O
(unused) 0 0 0 5 FB4_9 92 I/O I
(unused) 0 0 0 5 FB4_10 (b)
(unused) 0 0 0 5 FB4_11 93 I/O
led3_out<2> 3 0 0 2 FB4_12 STD 94 I/O O
(unused) 0 0 0 5 FB4_13 (b)
(unused) 0 0 0 5 FB4_14 95 I/O
(unused) 0 0 0 5 FB4_15 96 I/O I
(unused) 0 0 0 5 FB4_16 (b)
(unused) 0 0 0 5 FB4_17 97 I/O
(unused) 0 0 0 5 FB4_18 (b)
Signals Used by Logic in Function Block
1: cs_sw8 3: p_sw2 5: p_sw4
2: p_sw1 4: p_sw3
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
led3_out<5> XXXXX................................... 5 5
led3_out<6> XXXXX................................... 5 5
led3_out<2> XXXXX................................... 5 5
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB5 ***********************************
Number of function block inputs used/remaining: 5/49
Number of signals used by logic mapping into function block: 5
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 0 5 FB5_1 (b)
led2_out<0> 4 0 0 1 FB5_2 STD 35 I/O O
(unused) 0 0 0 5 FB5_3 (b)
(unused) 0 0 0 5 FB5_4 (b)
(unused) 0 0 0 5 FB5_5 36 I/O
(unused) 0 0 0 5 FB5_6 37 I/O
(unused) 0 0 0 5 FB5_7 (b)
led2_out<1> 4 0 0 1 FB5_8 STD 39 I/O O
(unused) 0 0 0 5 FB5_9 40 I/O
(unused) 0 0 0 5 FB5_10 (b)
(unused) 0 0 0 5 FB5_11 41 I/O
led2_out<2> 3 0 0 2 FB5_12 STD 42 I/O O
(unused) 0 0 0 5 FB5_13 (b)
(unused) 0 0 0 5 FB5_14 43 I/O
(unused) 0 0 0 5 FB5_15 46 I/O
(unused) 0 0 0 5 FB5_16 (b)
(unused) 0 0 0 5 FB5_17 49 I/O
(unused) 0 0 0 5 FB5_18 (b)
Signals Used by Logic in Function Block
1: cs_sw8 3: p_sw2 5: p_sw4
2: p_sw1 4: p_sw3
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
led2_out<0> XXXXX................................... 5 5
led2_out<1> XXXXX................................... 5 5
led2_out<2> XXXXX................................... 5 5
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB6 ***********************************
Number of function block inputs used/remaining: 5/49
Number of signals used by logic mapping into function block: 5
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 0 5 FB6_1 (b)
(unused) 0 0 0 5 FB6_2 74 I/O
(unused) 0 0 0 5 FB6_3 (b)
(unused) 0 0 0 5 FB6_4 (b)
led1_out<3> 5 0 0 0 FB6_5 STD 76 I/O O
(unused) 0 0 0 5 FB6_6 77 I/O I
(unused) 0 0 0 5 FB6_7 (b)
(unused) 0 0 0 5 FB6_8 78 I/O
(unused) 0 0 0 5 FB6_9 79 I/O
(unused) 0 0 0 5 FB6_10 (b)
led1_out<6> 4 0 0 1 FB6_11 STD 80 I/O O
(unused) 0 0 0 5 FB6_12 81 I/O
(unused) 0 0 0 5 FB6_13 (b)
(unused) 0 0 0 5 FB6_14 82 I/O
(unused) 0 0 0 5 FB6_15 85 I/O
(unused) 0 0 0 5 FB6_16 (b)
(unused) 0 0 0 5 FB6_17 86 I/O
(unused) 0 0 0 5 FB6_18 (b)
Signals Used by Logic in Function Block
1: cs_sw8 3: p_sw2 5: p_sw4
2: p_sw1 4: p_sw3
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
led1_out<3> XXXXX................................... 5 5
led1_out<6> XXXXX................................... 5 5
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB7 ***********************************
Number of function block inputs used/remaining: 5/49
Number of signals used by logic mapping into function block: 5
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 0 5 FB7_1 (b)
(unused) 0 0 0 5 FB7_2 50 I/O
(unused) 0 0 0 5 FB7_3 (b)
(unused) 0 0 0 5 FB7_4 (b)
led3_out<3> 5 0 0 0 FB7_5 STD 52 I/O O
(unused) 0 0 0 5 FB7_6 53 I/O
(unused) 0 0 0 5 FB7_7 (b)
(unused) 0 0 0 5 FB7_8 54 I/O
(unused) 0 0 0 5 FB7_9 55 I/O
(unused) 0 0 0 5 FB7_10 (b)
led3_out<0> 4 0 0 1 FB7_11 STD 56 I/O O
(unused) 0 0 0 5 FB7_12 58 I/O
(unused) 0 0 0 5 FB7_13 (b)
(unused) 0 0 0 5 FB7_14 59 I/O
(unused) 0 0 0 5 FB7_15 60 I/O
(unused) 0 0 0 5 FB7_16 (b)
(unused) 0 0 0 5 FB7_17 61 I/O
(unused) 0 0 0 5 FB7_18 (b)
Signals Used by Logic in Function Block
1: cs_sw8 3: p_sw2 5: p_sw4
2: p_sw1 4: p_sw3
Signal 1 2 3 4 Signals FB
Name 0----+----0----+----0----+----0----+----0 Used Inputs
led3_out<3> XXXXX................................... 5 5
led3_out<0> XXXXX................................... 5 5
0----+----1----+----2----+----3----+----4
0 0 0 0
Legend:
Total Pt - Total product terms used by the macrocell signal
Imp Pt - Product terms imported from other macrocells
Exp Pt - Product terms exported to other macrocells
in direction shown
Unused Pt - Unused local product terms remaining in macrocell
Loc - Location where logic was mapped in device
Pwr Mode - Macrocell power mode
Pin Type/Use - I - Input GCK - Global Clock
O - Output GTS - Global Output Enable
(b) - Buried macrocell GSR - Global Set/Reset
X(@) - Signal used as input (wire-AND input) to the macrocell logic.
The number of Signals Used may exceed the number of FB Inputs Used due
to wire-ANDing in the switch matrix.
*********************************** FB8 ***********************************
Number of function block inputs used/remaining: 5/49
Number of signals used by logic mapping into function block: 5
Signal Total Imp Exp Unused Loc Pwr Pin Pin Pin
Name Pt Pt Pt Pt Mode # Type Use
(unused) 0 0 0 5 FB8_1 (b)
(unused) 0 0 0 5 FB8_2 63 I/O
(unused) 0 0 0 5 FB8_3 (b)
(unused) 0 0 0 5 FB8_4 (b)
led2_out<3> 5 0 0 0 FB8_5 STD 64 I/O O
(unused) 0 0 0 5 FB8_6 65 I/O
(unused) 0 0 0 5 FB8_7 (b)
(unused) 0 0 0 5 FB8_8 66 I/O
(unused) 0 0 0 5 FB8_9 67 I/O
(unused) 0 0 0 5 FB8_10 (b)
led2_out<6> 4 0 0 1 FB8_11 STD 68 I/O O
(unused) 0 0 0 5 FB8_12 70 I/O
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