ucore.v

USBRTL电路的VHDL和Verilog代码

module Ucore
	(
	// inputs from bus
                testmode,
                testreset,
		clock48,	// 48 MHz clock
		rcvin,		// differential in
		vpin,		// plus in
		vmin,		// minus in

	// outputs to bus
		vmo,		// minus out
		vpo,		// plus out
		usboen,	// oe for usb bits

	// outputs to endpoints
                pwronreset,
		        usbreset,
                usbclockout,
                usbclock,
		endpwrdata,
		datapacketok,
		datapacketnotok,
		synthsof,
       // rom
        devromdescriptorindex,
        devromsetupaddr,
        romdevsetupdata,
	    romen,
        endp0internaltogglebit,
        setupcycle,
        setupbyteaddr,
        setupdata,
	    rcvack,
	    suspend,
		framenumber,
`include "Uvendorcmdios.v"
`include "Udevios.v"
	 );
  input  testmode;
  input  testreset;

  input	clock48;
  input	rcvin;
  input	vpin;
  input	vmin;

  output	vmo;
  output	vpo;
  output	usboen;

  input	pwronreset;
  output	usbreset;
  output	usbclockout;
  input	usbclock;
  output [7:0]	endpwrdata;
  output	datapacketok;
  output	datapacketnotok;
  output [6:0]	devromdescriptorindex;
  output [7:0]	devromsetupaddr;
  input [7:0]	romdevsetupdata;
  output	romen;
  output	endp0internaltogglebit;
  output	setupcycle;
  input [2:0]	setupbyteaddr;
  output [7:0]	setupdata;
  output	rcvack;
  output	suspend;
  output    synthsof;
  output [10:0]	framenumber;
`include "Uvendorcmdinouts.v"
`include "Udevinouts.v"

// wire for read ports, do em all, doesn't cost anything
// wires for sie to dev connections
wire	[7:0]	xmitdatabyte;
wire	[7:0]	rcvdatabyte;
wire	[6:0]	rcvaddress;
wire	[3:0]	rcvendpoint;
wire	[10:0]	hstframenumber;


Userialeng sie (
        // inputs from bus
        .testmode(testmode),
        .testreset(testreset),
        .clock48 (clock48),
        .rcvin (rcvin),
        .vpin (vpin),
        .vmin (vmin),
        .usbclock (usbclock),

	// inputs from device
	.xmitlastbyte (xmitlastbyte),
	.xmitdatatogglebit (xmitdatatogglebit),
	.xmitdatabyte (xmitdatabyte),
	.senddata (senddata),
	.sendnak (sendnak),
	.sendack (sendack),
	.sendstall (sendstall),

        // outputs
        .vmo (vmo),
        .vpo (vpo),
        .usboen (usboen),

	// outputs to device
        .usbclockout (usbclockout),
        .pwronreset(pwronreset),
        .usbreset (usbreset),
        .turnaround (turnaround),
        .rcvdatabyte (rcvdatabyte),
        .rcvdatabytevalid (rcvdatabytevalid),
        .rcvaddress (rcvaddress),
        .rcvaddressvalid (rcvaddressvalid),
        .rcvendpoint (rcvendpoint),
        .rcvendpointvalid (rcvendpointvalid),
        .startofframe (rcvsof),
        .framenumber (hstframenumber),
        .rcvdatatogglebit (rcvdatatogglebit),
        .rcvack (rcvack),
        .rcvdata (rcvdata),
        .rcvdatain (rcvdatain),
        .rcvdataout (rcvdataout),
        .rcvsetup (rcvsetup),
        .rcvpacketnotok (rcvpacketnotok),
        .rcvpacketok (rcvpacketok),
	.nextxmitbyte (nextxmitbyte),
	.acksent (acksent),
	.naksent (naksent),
	.datasent (datasent),
	.stallsent (stallsent),
	.suspend(suspend),
	.syncreset(syncreset),
	.resumen(1'b1),		// set to 0 if you want to do remote wakeup of usb
	.cpusignalresume(1'b0)	// set to 1 when cpu wants to drive resume signalling
        );

Udeviceintf dev	(
	// clock inputs
        .usbclock (usbclock),
	// inputs from sie
        .usbreset (usbreset),
		.syncreset(syncreset),
        .turnaround (turnaround),
        .rcvdatabyte (rcvdatabyte),
        .rcvdatabytevalid (rcvdatabytevalid),
        .rcvaddress (rcvaddress),
        .rcvaddressvalid (rcvaddressvalid),
        .rcvendpoint (rcvendpoint),
        .rcvendpointvalid (rcvendpointvalid),
        .rcvsof (rcvsof),
        .rcvdatatogglebit (rcvdatatogglebit),
        .rcvack (rcvack),
        .rcvdata (rcvdata),
        .rcvdatain (rcvdatain),
        .rcvdataout (rcvdataout),
        .rcvsetup (rcvsetup),
        .rcvpacketnotok (rcvpacketnotok),
        .rcvpacketok (rcvpacketok),
    	.nextxmitbyte (nextxmitbyte),
	.acksent (acksent),
	.naksent (naksent),
	.datasent (datasent),
	.stallsent (stallsent),

	// outputs to sie
	.xmitlastbyte (xmitlastbyte),
	.xmitdatatogglebit (xmitdatatogglebit),
	.xmitdatabyte (xmitdatabyte),
	.senddata (senddata),
	.sendnak (sendnak),
	.sendack (sendack),
	.sendstall (sendstall),

        // ROM
        .devromdescriptorindex(devromdescriptorindex),
        .devromsetupaddr(devromsetupaddr),
        .romdevsetupdata(romdevsetupdata),
        .romen(romen),
	.endp0internaltogglebit(endp0internaltogglebit),
        .setupcycle(setupcycle),
        .setupbyteaddr(setupbyteaddr),
        .setupdata(setupdata),

	// outputs to endpoints
	.endpwrdata (endpwrdata),
	.datapacketok (datapacketok),
	.datapacketnotok (datapacketnotok),
	.synthsof (synthsof),
	.hstframenumber (hstframenumber),
	.framenumber (framenumber),
    
	// outputs to device
	`include "Uvendorconnections.v"
	`include "Udevconnections.v"

endmodule