usb_mp3.v

USBRTL电路的VHDL和Verilog代码

module usb_mp3
	(
                xin,            // clk          - 1
                xout,           // clk          - 1
                dp,		// usb          - 1
                dm,		// usb          - 1
                pwronresetb,    // core         - 1   // 5 

                card_ready,     // sm           - 1  input R/nB客 悼老 signal
                io,             // sm           - 8  inout
                ale,            // sm           - 1  tri_output
                cle,            // sm           - 1  tri_output
                reb,            // sm           - 1  tri_output
                web,            // sm           - 1  tri_output
                wpb,            // sm           - 1  tri_output // 14

                data_in_mcu,    // mmc to mcu   - 1  input  
                data_out_mcu,   // mmc to mcu   - 1  output
                clk_mcu,        // mmc to mcu   - 1  output
                data_cf_in,     // mmc          - 1  inout
                data_fc_out,    // mmc          - 1  inout  
                clock_fc_out,   // mmc          - 1  tri_output  // 6


                gpiopin0,          //              - 1  input ----- scan_in1
                gpiopin1,          //              - 1  input ----- scan_in2
                gpiopin2,          //              - 1  input
                gpiopin3,          //              - 1  tri_output
                gpiopin4,          //              - 1  tri_output
                gpiopin5,          //              - 1  output // cs_fc_out (mcu) 
                gpiopin6,          //              - 1  output ----- scan_out1
                gpiopin7,          //              - 1  output ----- scan_out2 // 8

                test0,          //              - 1  input 
                test1,          //              - 1  input  // test mode : 00 normal
                                                            //             01 tranceiver test
                                                            //             10 SM_MMC test
                                                            //             11 GPIO test
                test2,          //              - 1  input  // asyncreset pin
                test3,          //              - 1  input scan enable
                test4,          //              - 1  input 
                test5,          //              - 1  output 
                test6          //              - 1  output
//             power
//              test7,          //              - 1  output(disablebus for sm)
//              test8,          //              - 1  output(out_enableb for sm)
//              test9,          //              - 1  output(dataout_dat_enable)
//              test10          //              - 1  output(datain_cmd_enable) //  11
                                                     //  44 + power(4) = 48 pins
//             gnd
	);
  
  input       xin;
  input       xout;
  input       dp;
  input       dm;
  input       pwronresetb;

  input       gpiopin0,gpiopin1,gpiopin2;
  output      gpiopin3,gpiopin4,gpiopin5;
  output      gpiopin6,gpiopin7;                           // tri_output

  input       test0,test1,test2,test3,test4;
  output      test5,test6;
  //output      test7,test8,test9,test10;

  input       card_ready;
  
  inout [7:0] io;
  output      ale;
  output      cle;
  output      reb;
  output      web;
  output      wpb;

  output       clk_mcu;
  input       data_in_mcu;
  output      data_out_mcu;
  inout	      data_cf_in;
  inout       data_fc_out;
  output      clock_fc_out;
  //output      cs_fc_out;



wire        mcclockout;
wire        mcclock;
wire        usbclockout;
wire        usbclock;
wire[7:0] smart_rd_data;
wire[7:0] smart_wr_data;
wire                 pwronresetb_in;
wire                 card_ready_in;
//wire                 cs_fc_out;
wire                 ale;
wire                 cle;
wire                 reb;
wire                 web;
wire                 wpb;
wire                 clock_fc_out;
wire	             clock_in;

wire test0_in;
wire test1_in;
wire test2_in;
wire test3_in;
wire test4_in;

wire     [1:0]       testselect;
assign               testselect = {test0_in,test1_in};

test_clock_mux u0_test_clock_mux(
                                 .in1(clock48), 
                                 .in2(usbclockout), 
                                 .in3(mcclockout), 
                                 .out1(usbclock), 
                                 .out2(mcclock),
                                 .testmode(testmode),
                                 .test0_in(test0_in),
                                 .test1_in(test1_in)
                                );
wire vpin;
wire vmin;
wire rcvin;
wire gpiopin5_out;
wire gpiopin6_out;
wire gpiopin7_out;

wire data_out;
wire clk_mcu;

wire suspend;
wire usboen;
wire vpo;
wire vmo;

wire data_in_mcu_in;

wire gpiopin0_in;
wire gpiopin1_in;
wire gpiopin2_in;

wire test5_out;
wire test6_out;

wire vpinin;
wire vminin;
wire rcvinin;

wire gpiopin5_outout;
wire gpiopin6_outout;
wire gpiopin7_outout;

wire data_out_mcu_out;
wire clk_mcu_out;

wire suspendsuspend;
wire usboenusboen;
wire vpovpo;
wire vmovmo;

assign    test5_out = suspend;
assign    test6_out = vmo;

test_mux u0_test_mux(
                .testselect(testselect),
                .vpin(vpin),
                .vmin(vmin),
                .rcvin(rcvin),
                .gpiopin5_out(gpiopin5_out),
                .gpiopin6_out(gpiopin6_out),
                .gpiopin7_out(gpiopin7_out),
                .data_out(data_outout),
                .clk_mcu(clk_mcumcu),
                .suspend(suspend),
                .usboen(usboen),
                .vpo(vpo),
                .vmo(vmo),
                .card_ready_in(card_ready_in),
                .data_in_mcu_in(data_in_mcu_in),
                .gpiopin0_in(gpiopin0_in),
                .gpiopin1_in(gpiopin1_in),
                .gpiopin2_in(gpiopin2_in),
                .test4_in(test4_in),

                .vpinin(vpinin),
                .vminin(vminin),
                .rcvinin(rcvinin),
                .gpiopin5_outout(gpiopin5_outout),
                .gpiopin6_outout(gpiopin6_outout),
                .gpiopin7_outout(gpiopin7_outout),

                .data_out_mcu_out(data_out_mcu_out),
                .clk_mcu_out(clk_mcu_out),

                .suspendsuspend(suspendsuspend),
                .usboenusboen(usboenusboen),
                .vpovpo(vpovpo),
                .vmovmo(vmovmo)
               );

Uusb_mmc_sm  usb_mmc_sm (
                // inputs from bus
                .pwronresetb( pwronresetb_in),
                .testmode(testmode),
                .testreset(test2_in),
                //.enmmc( 'b0),
                .clock48( clock48),

                .rcvin(rcvinin),
                .vpin(vpinin),
                .vmin(vminin),
                .gpiopin0(gpiopin0_in),
                .gpiopin1(gpiopin1_in),
                .gpiopin2(gpiopin2_in),
                .dataout_dat_in(dataout_dat_in),
                .dataout_dat_out(dataout_dat_out),
                .dataout_dat_enable(dataout_dat_enable),
                .card_ready(card_ready_in),
                .smart_rd_data(smart_rd_data),
                .vmo(vmo),
                .vpo(vpo),            // plus out
                .usboen(usboen), // oe for usb bits
                .suspend(suspend),
                .disablebus(disablebus),
                .data_in(data_in_mcu_in),
//                .cs_fc_out(cs_fc_out_out),
                .clock_fc_out(clock_fc_out_out),
                .datain_cmd_in(datain_cmd_in),
                .datain_cmd_out(datain_cmd_out),
                .datain_cmd_enable(datain_cmd_enable),
                .mcclock_out(mcclockout),
                .mcclock(mcclock),
                .gpiopin3(gpiopin3_out),
                .gpiopin4(gpiopin4_out),
                .gpiopin5(gpiopin5_out),
                .gpiopin6(gpiopin6_out),
                .gpiopin7(gpiopin7_out),
                .data_out(data_outout),
                .clk_mcu(clk_mcumcu),
                .ale(ale_out),
                .cle(cle_out),
                .reb(reb_out),
                .web(web_out),
                .usbclock(usbclock),
                .usbclockout(usbclockout),
                .wpb(wpb_out),
                .out_enable(out_enable),
                .smart_wr_data(smart_wr_data)
                );

pc3b01 u0_pc3b01(
                 .cin(dataout_dat_in),
                 .pad(data_cf_in),
                 .i(dataout_dat_out),
                 .oen(dataout_dat_enable)
                 );

pc3b01 u1_pc3b01 (
                 .cin(datain_cmd_in),
                 .pad(data_fc_out),
                 .i(datain_cmd_out),
                 .oen(datain_cmd_enable)
                 );


pc3b01 u2_pc3b01(                        // 5 kind of tri-stat pad
                 .cin(smart_rd_data[7]),
                 .pad(io[7]),
                 .i(smart_wr_data[7]),
                 .oen(out_enable)
                 );

pc3b01 u3_pc3b01(                        // 5 kind of tri-stat pad
                 .cin(smart_rd_data[6]),
                 .pad(io[6]),
                 .i(smart_wr_data[6]),
                 .oen(out_enable)
                 );

pc3b01 u4_pc3b01(                        // 5 kind of tri-stat pad
                 .cin(smart_rd_data[5]),
                 .pad(io[5]),
                 .i(smart_wr_data[5]),
                 .oen(out_enable)
                 );

pc3b01 u5_pc3b01(                        // 5 kind of tri-stat pad
                 .cin(smart_rd_data[4]),
                 .pad(io[4]),
                 .i(smart_wr_data[4]),
                 .oen(out_enable)
                 );
pc3b01 u6_pc3b01(                        // 5 kind of tri-stat pad
                 .cin(smart_rd_data[3]),
                 .pad(io[3]),
                 .i(smart_wr_data[3]),
                 .oen(out_enable)
                 );

pc3b01 u7_pc3b01(                        // 5 kind of tri-stat pad
                 .cin(smart_rd_data[2]),
                 .pad(io[2]),
                 .i(smart_wr_data[2]),
                 .oen( out_enable )
                 );

pc3b01 u8_pc3b01(                        // 5 kind of tri-stat pad
                 .cin(smart_rd_data[1]),
                 .pad(io[1]),
                 .i(smart_wr_data[1]),
                 .oen( out_enable )
                 );

pc3b01 u9_pc3b01(                        // 5 kind of tri-stat pad
                 .cin(smart_rd_data[0]),
                 .pad(io[0]),
                 .i(smart_wr_data[0]),
                 .oen( out_enable )
                 );

pc3d21      u0_pc3d21 (              // just only schmit trigger input only pad
                       .pad(pwronresetb),
                       .cin(pwronresetb_in)
                      );

pc3d01      u0_pc3d01 (              // just only input only pad
                       .pad(card_ready),
                       .cin(card_ready_in)
                      );

pc3t01 u0_pc3t01 (
                .oen(disablebus),
                .i( ale_out),
                .pad( ale)
              );

pc3t01 u1_pc3t01 (
                .oen(disablebus),
                .i( cle_out),
                .pad( cle)
              );

pc3t01 u2_pc3t01 (
                .oen(disablebus),
                .i( reb_out),
                .pad( reb)
              );

pc3t01 u3_pc3t01 (
                .oen(disablebus),
                .i( web_out),
                .pad( web)