usiedplldef.v

USBRTL电路的VHDL和Verilog代码

/******************************************
	Filename: 	siedplldef.v 1.3
******************************************/

// one-hot state machine deinitions for dpll states
parameter [7:0] 
	DPLLIDLE =	8'b00000001,
	DPLL1ST =	8'b00000010,
	DPLLQ1 =	8'b00000100,
	DPLLQ2 =	8'b00001000,
	DPLLQ3 =	8'b00010000,
	DPLLQ4 =	8'b00100000,
	DPLLQ5 =	8'b01000000,
	DPLLSE0 =	8'b10000000;