adc812.rpt

请先删除编译后的debug/release目录以减少压缩包大小

Project Information                                          g:\lsm\adc812.rpt

MAX+plus II Compiler Report File
Version 10.0 9/14/2000
Compiled: 06/21/2006 12:41:52

Copyright (C) 1988-2000 Altera Corporation
Any megafunction design, and related net list (encrypted or decrypted),
support information, device programming or simulation file, and any other
associated documentation or information provided by Altera or a partner
under Altera's Megafunction Partnership Program may be used only to
program PLD devices (but not masked PLD devices) from Altera.  Any other
use of such megafunction design, net list, support information, device
programming or simulation file, or any other related documentation or
information is prohibited for any other purpose, including, but not
limited to modification, reverse engineering, de-compiling, or use with
any other silicon devices, unless such use is explicitly licensed under
a separate agreement with Altera or a megafunction partner.  Title to
the intellectual property, including patents, copyrights, trademarks,
trade secrets, or maskworks, embodied in any such megafunction design,
net list, support information, device programming or simulation file, or
any other related documentation or information provided by Altera or a
megafunction partner, remains with Altera, the megafunction partner, or
their respective licensors.  No other licenses, including any licenses
needed under any third party's intellectual property, are provided herein.



***** Project compilation was successful


ADC812


** DEVICE SUMMARY **

Chip/                     Input   Output   Bidir         Shareable
POF       Device          Pins    Pins     Pins     LCs  Expanders  % Utilized

adc812    EPM7096LC68-7    17       5        0      82      34          85 %
adc8121   EPM7096LC68-7    8        16       0      93      54          96 %

TOTAL:                     25       21       0      175     88          91 %

User Pins:                 8        12       0  



Project Information                                          g:\lsm\adc812.rpt

** PROJECT COMPILATION MESSAGES **

Warning: Primitive 'DOUT10' is stuck at GND
Error: Project does not fit in specified device(s)
Info: Trying to find new partition/fit after discarding assignments as requested with the Partitioner/Fitter Status dialog box


Project Information                                          g:\lsm\adc812.rpt

** MULTIPLE PIN CONNECTIONS **


Connect: {adc8121@29,   adc812@13}

For node name 'INPUT3'
Connect: {adc8121@8,    adc812@19}

For node name 'INPUT2'
Connect: {adc8121@7,    adc812@20}

For node name 'INPUT1'
Connect: {adc8121@5,    adc812@22}

For node name 'INPUT0'
Connect: {adc8121@4,    adc812@33}

For node name 'INPUT7'
Connect: {adc8121@9,    adc812@14}

For node name 'INPUT6'
Connect: {adc8121@10,   adc812@15}

For node name 'INPUT5'
Connect: {adc8121@13,   adc812@17}

For node name 'INPUT4'
Connect: {adc8121@12,   adc812@18}

Connect: {adc8121@33,   adc812@5}

Connect: {adc8121@17,   adc812@4}

Connect: {adc8121@30,   adc812@23}

Connect: {adc8121@28,   adc812@10}

Connect: {adc8121@20,   adc812@12}

Connect: {adc8121@19,   adc812@9}

Connect: {adc8121@18,   adc812@8}

Connect: {adc8121@22,   adc812@7}


Project Information                                          g:\lsm\adc812.rpt

** FILE HIERARCHY **



|lpm_add_sub:3034|
|lpm_add_sub:3034|addcore:adder|
|lpm_add_sub:3034|addcore:adder|addcore:adder0|
|lpm_add_sub:3034|altshift:result_ext_latency_ffs|
|lpm_add_sub:3034|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3034|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3148|
|lpm_add_sub:3148|addcore:adder|
|lpm_add_sub:3148|addcore:adder|addcore:adder0|
|lpm_add_sub:3148|altshift:result_ext_latency_ffs|
|lpm_add_sub:3148|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3148|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3149|
|lpm_add_sub:3149|addcore:adder|
|lpm_add_sub:3149|addcore:adder|addcore:adder0|
|lpm_add_sub:3149|altshift:result_ext_latency_ffs|
|lpm_add_sub:3149|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3149|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3229|
|lpm_add_sub:3229|addcore:adder|
|lpm_add_sub:3229|addcore:adder|addcore:adder0|
|lpm_add_sub:3229|altshift:result_ext_latency_ffs|
|lpm_add_sub:3229|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3229|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3308|
|lpm_add_sub:3308|addcore:adder|
|lpm_add_sub:3308|addcore:adder|addcore:adder0|
|lpm_add_sub:3308|altshift:result_ext_latency_ffs|
|lpm_add_sub:3308|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3308|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3438|
|lpm_add_sub:3438|addcore:adder|
|lpm_add_sub:3438|addcore:adder|addcore:adder0|
|lpm_add_sub:3438|altshift:result_ext_latency_ffs|
|lpm_add_sub:3438|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3438|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3439|
|lpm_add_sub:3439|addcore:adder|
|lpm_add_sub:3439|addcore:adder|addcore:adder0|
|lpm_add_sub:3439|altshift:result_ext_latency_ffs|
|lpm_add_sub:3439|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3439|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3440|
|lpm_add_sub:3440|addcore:adder|
|lpm_add_sub:3440|addcore:adder|addcore:adder0|
|lpm_add_sub:3440|altshift:result_ext_latency_ffs|
|lpm_add_sub:3440|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3440|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3531|
|lpm_add_sub:3531|addcore:adder|
|lpm_add_sub:3531|addcore:adder|addcore:adder0|
|lpm_add_sub:3531|altshift:result_ext_latency_ffs|
|lpm_add_sub:3531|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3531|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3532|
|lpm_add_sub:3532|addcore:adder|
|lpm_add_sub:3532|addcore:adder|addcore:adder0|
|lpm_add_sub:3532|altshift:result_ext_latency_ffs|
|lpm_add_sub:3532|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3532|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3533|
|lpm_add_sub:3533|addcore:adder|
|lpm_add_sub:3533|addcore:adder|addcore:adder0|
|lpm_add_sub:3533|altshift:result_ext_latency_ffs|
|lpm_add_sub:3533|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3533|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3618|
|lpm_add_sub:3618|addcore:adder|
|lpm_add_sub:3618|addcore:adder|addcore:adder0|
|lpm_add_sub:3618|altshift:result_ext_latency_ffs|
|lpm_add_sub:3618|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3618|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3619|
|lpm_add_sub:3619|addcore:adder|
|lpm_add_sub:3619|addcore:adder|addcore:adder0|
|lpm_add_sub:3619|altshift:result_ext_latency_ffs|
|lpm_add_sub:3619|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3619|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3699|
|lpm_add_sub:3699|addcore:adder|
|lpm_add_sub:3699|addcore:adder|addcore:adder0|
|lpm_add_sub:3699|altshift:result_ext_latency_ffs|
|lpm_add_sub:3699|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3699|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3814|
|lpm_add_sub:3814|addcore:adder|
|lpm_add_sub:3814|addcore:adder|addcore:adder0|
|lpm_add_sub:3814|altshift:result_ext_latency_ffs|
|lpm_add_sub:3814|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3814|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3944|
|lpm_add_sub:3944|addcore:adder|
|lpm_add_sub:3944|addcore:adder|addcore:adder0|
|lpm_add_sub:3944|altshift:result_ext_latency_ffs|
|lpm_add_sub:3944|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3944|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3945|
|lpm_add_sub:3945|addcore:adder|
|lpm_add_sub:3945|addcore:adder|addcore:adder0|
|lpm_add_sub:3945|altshift:result_ext_latency_ffs|
|lpm_add_sub:3945|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3945|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:3946|
|lpm_add_sub:3946|addcore:adder|
|lpm_add_sub:3946|addcore:adder|addcore:adder0|
|lpm_add_sub:3946|altshift:result_ext_latency_ffs|
|lpm_add_sub:3946|altshift:carry_ext_latency_ffs|
|lpm_add_sub:3946|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:4037|
|lpm_add_sub:4037|addcore:adder|
|lpm_add_sub:4037|addcore:adder|addcore:adder0|
|lpm_add_sub:4037|altshift:result_ext_latency_ffs|
|lpm_add_sub:4037|altshift:carry_ext_latency_ffs|
|lpm_add_sub:4037|altshift:oflow_ext_latency_ffs|
|lpm_add_sub:4038|
|lpm_add_sub:4038|addcore:adder|
|lpm_add_sub:4038|addcore:adder|addcore:adder0|
|lpm_add_sub:4038|altshift:result_ext_latency_ffs|