delded7.vhd

请先删除编译后的debug/release目录以减少压缩包大小

LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
ENTITY  DELE7  IS
 PORT(INP:IN STD_LOGIC_VECTOR(3 DOWNTO 0);
 		CON:IN STD_LOGIC_VECTOR(1 DOWNTO 0);
      OUTP:OUT STD_LOGIC_VECTOR(7 DOWNTO 0));
END DELE7;
ARCHITECTURE  FUNC OF DELE7 IS
 SIGNAL S:STD_LOGIC_VECTOR(6 DOWNTO 0);
 BEGIN
P1: PROCESS(INP)
  BEGIN
   CASE INP IS
    WHEN"0000"=>S<="1111110";
    WHEN"0001"=>S<="0110000";
    WHEN"0010"=>S<="1101101";
    WHEN"0011"=>S<="1111001";
    WHEN"0100"=>S<="0110011";
    WHEN"0101"=>S<="1011011";
    WHEN"0110"=>S<="1011111";
    WHEN"0111"=>S<="1110000";
    WHEN"1000"=>S<="1111111";
    WHEN"1001"=>S<="1111011";
    WHEN OTHERS=>S<="0000000";
  END CASE;
END PROCESS P1;
P2:PROCESS(CON,S)
 BEGIN
  IF CON="00" THEN
    OUTP<=S&'1';
  ELSE  OUTP<=S&'0'; 
END IF;
END  PROCESS  P2;
END  FUNC;