lp_rx.do

来自「altera fpga 和ts201的linkport接口设计」· DO 代码 · 共 37 行

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vlib work
vmap work work

vlog C:/quartus/eda/sim_lib/altera_mf.v
vlog -reportprogress 300 -work work rx_test_harness.v
vlog -reportprogress 300 -work work ../../../source/verilog/lp_rx.v

vsim work.rx_tb

view wave
do rx_wave.do

run -all