lp_tx_stratix.map.summary

来自「altera fpga 和ts201的linkport接口设计」· SUMMARY 代码 · 共 13 行

Analysis & Synthesis Status : Successful - Sat Apr 07 15:14:26 2012
Quartus II 32-bit Version : 11.1 Build 173 11/01/2011 SJ Full Version
Revision Name : lp_tx_stratix
Top-level Entity Name : lp_tx_top_stratix
Family : Stratix
Total logic elements : 150
Total pins : 10
Total virtual pins : 39
Total memory bits : 528
DSP block 9-bit elements : 0
Total PLLs : 1
Total DLLs : 0