lp_tx_top_stratix.quartus

altera fpga 和ts201的linkport接口设计

FILES
{
	VERILOG_FILE = ..\..\..\source\verilog\lp_tx.v;
	VERILOG_FILE = lp_tx_top_stratix.v;
}
COMPILER_SETTINGS_LIST
{
	COMPILER_SETTINGS = lp_tx_top_stratix;
}
SIMULATOR_SETTINGS_LIST
{
	SIMULATOR_SETTINGS = lp_tx_top_stratix;
}
SOFTWARE_SETTINGS_LIST
{
	SOFTWARE_SETTINGS = Debug;
	SOFTWARE_SETTINGS = Release;
}