lp_rx_top_cyclone.map.rpt
来自「altera fpga 和ts201的linkport接口设计」· RPT 代码 · 共 665 行 · 第 1/5 页
RPT
665 行
+---------------------------------+-------+------+---------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+-------+------+---------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
+---------------------------------+-------+------+---------------------------------------------------------+
+----------------------------------------------------------------------------------------------------------+
; Source assignments for lp_rx:lp_rx|dcfifo:rx_fifo|dcfifo_1nm1:auto_generated|dffpipe_ed9:dffpipe_rs_dbwp ;
+---------------------------------+-------+------+---------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+-------+------+---------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
+---------------------------------+-------+------+---------------------------------------------------------+
+-----------------------------------------------------------------------------------------------------------------+
; Source assignments for lp_rx:lp_rx|dcfifo:rx_fifo|dcfifo_1nm1:auto_generated|alt_synch_pipe_mc8:dffpipe_rs_dgwp ;
+-----------------------+-------+------+--------------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+-----------------------+-------+------+--------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF ; - ; - ;
+-----------------------+-------+------+--------------------------------------------------------------------------+
+--------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for lp_rx:lp_rx|dcfifo:rx_fifo|dcfifo_1nm1:auto_generated|alt_synch_pipe_mc8:dffpipe_rs_dgwp|dffpipe_gd9:dffpipe9 ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------+
+----------------------------------------------------------------------------------------------------------+
; Source assignments for lp_rx:lp_rx|dcfifo:rx_fifo|dcfifo_1nm1:auto_generated|dffpipe_ed9:dffpipe_wr_dbuw ;
+---------------------------------+-------+------+---------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+-------+------+---------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
+---------------------------------+-------+------+---------------------------------------------------------+
+----------------------------------------------------------------------------------------------------------+
; Source assignments for lp_rx:lp_rx|dcfifo:rx_fifo|dcfifo_1nm1:auto_generated|dffpipe_ed9:dffpipe_wrusedw ;
+---------------------------------+-------+------+---------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+-------+------+---------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
+---------------------------------+-------+------+---------------------------------------------------------+
+-----------------------------------------------------------------------------------------------------------------+
; Source assignments for lp_rx:lp_rx|dcfifo:rx_fifo|dcfifo_1nm1:auto_generated|alt_synch_pipe_mc8:dffpipe_ws_dgrp ;
+-----------------------+-------+------+--------------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+-----------------------+-------+------+--------------------------------------------------------------------------+
; X_ON_VIOLATION_OPTION ; OFF ; - ; - ;
+-----------------------+-------+------+--------------------------------------------------------------------------+
+--------------------------------------------------------------------------------------------------------------------------------------+
; Source assignments for lp_rx:lp_rx|dcfifo:rx_fifo|dcfifo_1nm1:auto_generated|alt_synch_pipe_mc8:dffpipe_ws_dgrp|dffpipe_gd9:dffpipe9 ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
+---------------------------------+-------+------+-------------------------------------------------------------------------------------+
+----------------------------------------------------------------------------------------------------------+
; Source assignments for lp_rx:lp_rx|dcfifo:rx_fifo|dcfifo_1nm1:auto_generated|dffpipe_ed9:dffpipe_ws_nbrp ;
+---------------------------------+-------+------+---------------------------------------------------------+
; Assignment ; Value ; From ; To ;
+---------------------------------+-------+------+---------------------------------------------------------+
; AUTO_SHIFT_REGISTER_RECOGNITION ; OFF ; - ; - ;
+---------------------------------+-------+------+---------------------------------------------------------+
+-----------------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: Top-level Entity: |lp_rx_top_cyclone ;
+----------------+---------+--------------------------------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+---------+--------------------------------------------------------+
; DEVICE ; Cyclone ; String ;
+----------------+---------+--------------------------------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+----------------------------------------------------------+
; Parameter Settings for User Entity Instance: lp_rx:lp_rx ;
+----------------+---------+-------------------------------+
; Parameter Name ; Value ; Type ;
+----------------+---------+-------------------------------+
; DEVICE ; Cyclone ; String ;
+----------------+---------+-------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+-------------------------------------------------------------------------+
; Parameter Settings for User Entity Instance: lp_rx:lp_rx|dcfifo:rx_fifo ;
+-------------------------+-------------+---------------------------------+
; Parameter Name ; Value ; Type ;
+-------------------------+-------------+---------------------------------+
; WIDTH_BYTEENA ; 1 ; Untyped ;
; AUTO_CARRY_CHAINS ; ON ; AUTO_CARRY ;
; IGNORE_CARRY_BUFFERS ; OFF ; IGNORE_CARRY ;
; AUTO_CASCADE_CHAINS ; ON ; AUTO_CASCADE ;
; IGNORE_CASCADE_BUFFERS ; OFF ; IGNORE_CASCADE ;
; LPM_WIDTH ; 33 ; Signed Integer ;
; LPM_NUMWORDS ; 128 ; Signed Integer ;
; LPM_WIDTHU ; 7 ; Signed Integer ;
; LPM_SHOWAHEAD ; OFF ; Untyped ;
; UNDERFLOW_CHECKING ; ON ; Untyped ;
; OVERFLOW_CHECKING ; ON ; Untyped ;
; USE_EAB ; ON ; Untyped ;
; ADD_RAM_OUTPUT_REGISTER ; OFF ; Untyped ;
; DELAY_RDUSEDW ; 1 ; Untyped ;
; DELAY_WRUSEDW ; 1 ; Untyped ;
; RDSYNC_DELAYPIPE ; 3 ; Untyped ;
; WRSYNC_DELAYPIPE ; 3 ; Untyped ;
; CLOCKS_ARE_SYNCHRONIZED ; FALSE ; Untyped ;
; MAXIMIZE_SPEED ; 5 ; Untyped ;
; DEVICE_FAMILY ; Cyclone ; Untyped ;
; ADD_USEDW_MSB_BIT ; OFF ; Untyped ;
; WRITE_ACLR_SYNCH ; OFF ; Untyped ;
; READ_ACLR_SYNCH ; OFF ; Untyped ;
; CBXI_PARAMETER ; dcfifo_1nm1 ; Untyped ;
+-------------------------+-------------+---------------------------------+
Note: In order to hide this table in the UI and the text report file, please set the "Show Parameter Settings in Synthesis Report" option in "Analysis and Synthesis Settings -> More Settings" to "Off".
+---------------------------------------------------------+
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