cnt10.tan.qmsg

基于VHDL语言的频率计具有高速计频

{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register lpm_counter:cqi_rtl_0\|dffs\[1\] register lpm_counter:cqi_rtl_0\|dffs\[2\] 76.92 MHz 13.0 ns Internal " "Info: Clock \"clk\" has Internal fmax of 76.92 MHz between source register \"lpm_counter:cqi_rtl_0\|dffs\[1\]\" and destination register \"lpm_counter:cqi_rtl_0\|dffs\[2\]\" (period= 13.0 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.000 ns + Longest register register " "Info: + Longest register to register delay is 8.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lpm_counter:cqi_rtl_0\|dffs\[1\] 1 REG LC11 8 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC11; Fanout = 8; REG Node = 'lpm_counter:cqi_rtl_0\|dffs\[1\]'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "" { lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(6.000 ns) 8.000 ns lpm_counter:cqi_rtl_0\|dffs\[2\] 2 REG LC8 7 " "Info: 2: + IC(2.000 ns) + CELL(6.000 ns) = 8.000 ns; Loc. = LC8; Fanout = 7; REG Node = 'lpm_counter:cqi_rtl_0\|dffs\[2\]'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "8.000 ns" { lpm_counter:cqi_rtl_0|dffs[1] lpm_counter:cqi_rtl_0|dffs[2] } "NODE_NAME" } "" } } { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "6.000 ns 75.00 % " "Info: Total cell delay = 6.000 ns ( 75.00 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 25.00 % " "Info: Total interconnect delay = 2.000 ns ( 25.00 % )" {  } {  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "8.000 ns" { lpm_counter:cqi_rtl_0|dffs[1] lpm_counter:cqi_rtl_0|dffs[2] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "8.000 ns" { lpm_counter:cqi_rtl_0|dffs[1] lpm_counter:cqi_rtl_0|dffs[2] } { 0.000ns 2.000ns } { 0.000ns 6.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 3.000 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 3.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.000 ns) 3.000 ns clk 1 CLK PIN_83 4 " "Info: 1: + IC(0.000 ns) + CELL(3.000 ns) = 3.000 ns; Loc. = PIN_83; Fanout = 4; CLK Node = 'clk'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "" { clk } "NODE_NAME" } "" } } { "cnt10.vhd" "" { Text "E:/日期/0517/fraq/cnt10/cnt10.vhd" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 3.000 ns lpm_counter:cqi_rtl_0\|dffs\[2\] 2 REG LC8 7 " "Info: 2: + IC(0.000 ns) + CELL(0.000 ns) = 3.000 ns; Loc. = LC8; Fanout = 7; REG Node = 'lpm_counter:cqi_rtl_0\|dffs\[2\]'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "0.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[2] } "NODE_NAME" } "" } } { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.000 ns 100.00 % " "Info: Total cell delay = 3.000 ns ( 100.00 % )" {  } {  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "3.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[2] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.000 ns" { clk clk~out lpm_counter:cqi_rtl_0|dffs[2] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 3.000ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 3.000 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 3.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.000 ns) 3.000 ns clk 1 CLK PIN_83 4 " "Info: 1: + IC(0.000 ns) + CELL(3.000 ns) = 3.000 ns; Loc. = PIN_83; Fanout = 4; CLK Node = 'clk'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "" { clk } "NODE_NAME" } "" } } { "cnt10.vhd" "" { Text "E:/日期/0517/fraq/cnt10/cnt10.vhd" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 3.000 ns lpm_counter:cqi_rtl_0\|dffs\[1\] 2 REG LC11 8 " "Info: 2: + IC(0.000 ns) + CELL(0.000 ns) = 3.000 ns; Loc. = LC11; Fanout = 8; REG Node = 'lpm_counter:cqi_rtl_0\|dffs\[1\]'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "0.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.000 ns 100.00 % " "Info: Total cell delay = 3.000 ns ( 100.00 % )" {  } {  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "3.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.000 ns" { clk clk~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 3.000ns 0.000ns } } }  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "3.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[2] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.000 ns" { clk clk~out lpm_counter:cqi_rtl_0|dffs[2] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 3.000ns 0.000ns } } } { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "3.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.000 ns" { clk clk~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 3.000ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.000 ns + " "Info: + Micro clock to output delay of source is 1.000 ns" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "4.000 ns + " "Info: + Micro setup delay of destination is 4.000 ns" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "8.000 ns" { lpm_counter:cqi_rtl_0|dffs[1] lpm_counter:cqi_rtl_0|dffs[2] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "8.000 ns" { lpm_counter:cqi_rtl_0|dffs[1] lpm_counter:cqi_rtl_0|dffs[2] } { 0.000ns 2.000ns } { 0.000ns 6.000ns } } } { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "3.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[2] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.000 ns" { clk clk~out lpm_counter:cqi_rtl_0|dffs[2] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 3.000ns 0.000ns } } } { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "3.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.000 ns" { clk clk~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 3.000ns 0.000ns } } }  } 0}
{ "Info" "ITDB_TSU_RESULT" "lpm_counter:cqi_rtl_0\|dffs\[1\] ena clk 11.000 ns register " "Info: tsu for register \"lpm_counter:cqi_rtl_0\|dffs\[1\]\" (data pin = \"ena\", clock pin = \"clk\") is 11.000 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "10.000 ns + Longest pin register " "Info: + Longest pin to register delay is 10.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns ena 1 PIN PIN_52 4 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_52; Fanout = 4; PIN Node = 'ena'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "" { ena } "NODE_NAME" } "" } } { "cnt10.vhd" "" { Text "E:/日期/0517/fraq/cnt10/cnt10.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(6.000 ns) 10.000 ns lpm_counter:cqi_rtl_0\|dffs\[1\] 2 REG LC11 8 " "Info: 2: + IC(2.000 ns) + CELL(6.000 ns) = 10.000 ns; Loc. = LC11; Fanout = 8; REG Node = 'lpm_counter:cqi_rtl_0\|dffs\[1\]'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "8.000 ns" { ena lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.000 ns 80.00 % " "Info: Total cell delay = 8.000 ns ( 80.00 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 20.00 % " "Info: Total interconnect delay = 2.000 ns ( 20.00 % )" {  } {  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "10.000 ns" { ena lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.000 ns" { ena ena~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 2.000ns 6.000ns } } }  } 0} { "Info" "ITDB_FULL_TSU_DELAY" "4.000 ns + " "Info: + Micro setup delay of destination is 4.000 ns" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 3.000 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 3.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.000 ns) 3.000 ns clk 1 CLK PIN_83 4 " "Info: 1: + IC(0.000 ns) + CELL(3.000 ns) = 3.000 ns; Loc. = PIN_83; Fanout = 4; CLK Node = 'clk'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "" { clk } "NODE_NAME" } "" } } { "cnt10.vhd" "" { Text "E:/日期/0517/fraq/cnt10/cnt10.vhd" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 3.000 ns lpm_counter:cqi_rtl_0\|dffs\[1\] 2 REG LC11 8 " "Info: 2: + IC(0.000 ns) + CELL(0.000 ns) = 3.000 ns; Loc. = LC11; Fanout = 8; REG Node = 'lpm_counter:cqi_rtl_0\|dffs\[1\]'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "0.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.000 ns 100.00 % " "Info: Total cell delay = 3.000 ns ( 100.00 % )" {  } {  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "3.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.000 ns" { clk clk~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 3.000ns 0.000ns } } }  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "10.000 ns" { ena lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.000 ns" { ena ena~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 2.000ns 6.000ns } } } { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "3.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.000 ns" { clk clk~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 3.000ns 0.000ns } } }  } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk carry_out lpm_counter:cqi_rtl_0\|dffs\[1\] 17.000 ns register " "Info: tco from clock \"clk\" to destination pin \"carry_out\" through register \"lpm_counter:cqi_rtl_0\|dffs\[1\]\" is 17.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 3.000 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 3.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.000 ns) 3.000 ns clk 1 CLK PIN_83 4 " "Info: 1: + IC(0.000 ns) + CELL(3.000 ns) = 3.000 ns; Loc. = PIN_83; Fanout = 4; CLK Node = 'clk'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "" { clk } "NODE_NAME" } "" } } { "cnt10.vhd" "" { Text "E:/日期/0517/fraq/cnt10/cnt10.vhd" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 3.000 ns lpm_counter:cqi_rtl_0\|dffs\[1\] 2 REG LC11 8 " "Info: 2: + IC(0.000 ns) + CELL(0.000 ns) = 3.000 ns; Loc. = LC11; Fanout = 8; REG Node = 'lpm_counter:cqi_rtl_0\|dffs\[1\]'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "0.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.000 ns 100.00 % " "Info: Total cell delay = 3.000 ns ( 100.00 % )" {  } {  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "3.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.000 ns" { clk clk~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 3.000ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TCO_DELAY" "1.000 ns + " "Info: + Micro clock to output delay of source is 1.000 ns" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "13.000 ns + Longest register pin " "Info: + Longest register to pin delay is 13.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns lpm_counter:cqi_rtl_0\|dffs\[1\] 1 REG LC11 8 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC11; Fanout = 8; REG Node = 'lpm_counter:cqi_rtl_0\|dffs\[1\]'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "" { lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(7.000 ns) 9.000 ns reduce_nor~1 2 COMB LC3 1 " "Info: 2: + IC(2.000 ns) + CELL(7.000 ns) = 9.000 ns; Loc. = LC3; Fanout = 1; COMB Node = 'reduce_nor~1'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "9.000 ns" { lpm_counter:cqi_rtl_0|dffs[1] reduce_nor~1 } "NODE_NAME" } "" } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(4.000 ns) 13.000 ns carry_out 3 PIN PIN_12 0 " "Info: 3: + IC(0.000 ns) + CELL(4.000 ns) = 13.000 ns; Loc. = PIN_12; Fanout = 0; PIN Node = 'carry_out'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "4.000 ns" { reduce_nor~1 carry_out } "NODE_NAME" } "" } } { "cnt10.vhd" "" { Text "E:/日期/0517/fraq/cnt10/cnt10.vhd" 11 -1 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "11.000 ns 84.62 % " "Info: Total cell delay = 11.000 ns ( 84.62 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 15.38 % " "Info: Total interconnect delay = 2.000 ns ( 15.38 % )" {  } {  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "13.000 ns" { lpm_counter:cqi_rtl_0|dffs[1] reduce_nor~1 carry_out } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "13.000 ns" { lpm_counter:cqi_rtl_0|dffs[1] reduce_nor~1 carry_out } { 0.000ns 2.000ns 0.000ns } { 0.000ns 7.000ns 4.000ns } } }  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "3.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.000 ns" { clk clk~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 3.000ns 0.000ns } } } { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "13.000 ns" { lpm_counter:cqi_rtl_0|dffs[1] reduce_nor~1 carry_out } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "13.000 ns" { lpm_counter:cqi_rtl_0|dffs[1] reduce_nor~1 carry_out } { 0.000ns 2.000ns 0.000ns } { 0.000ns 7.000ns 4.000ns } } }  } 0}
{ "Info" "ITDB_TH_RESULT" "lpm_counter:cqi_rtl_0\|dffs\[1\] ena clk -3.000 ns register " "Info: th for register \"lpm_counter:cqi_rtl_0\|dffs\[1\]\" (data pin = \"ena\", clock pin = \"clk\") is -3.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 3.000 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to destination register is 3.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(3.000 ns) 3.000 ns clk 1 CLK PIN_83 4 " "Info: 1: + IC(0.000 ns) + CELL(3.000 ns) = 3.000 ns; Loc. = PIN_83; Fanout = 4; CLK Node = 'clk'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "" { clk } "NODE_NAME" } "" } } { "cnt10.vhd" "" { Text "E:/日期/0517/fraq/cnt10/cnt10.vhd" 5 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 3.000 ns lpm_counter:cqi_rtl_0\|dffs\[1\] 2 REG LC11 8 " "Info: 2: + IC(0.000 ns) + CELL(0.000 ns) = 3.000 ns; Loc. = LC11; Fanout = 8; REG Node = 'lpm_counter:cqi_rtl_0\|dffs\[1\]'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "0.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.000 ns 100.00 % " "Info: Total cell delay = 3.000 ns ( 100.00 % )" {  } {  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "3.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.000 ns" { clk clk~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 3.000ns 0.000ns } } }  } 0} { "Info" "ITDB_FULL_TH_DELAY" "4.000 ns + " "Info: + Micro hold delay of destination is 4.000 ns" {  } { { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "10.000 ns - Shortest pin register " "Info: - Shortest pin to register delay is 10.000 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(2.000 ns) 2.000 ns ena 1 PIN PIN_52 4 " "Info: 1: + IC(0.000 ns) + CELL(2.000 ns) = 2.000 ns; Loc. = PIN_52; Fanout = 4; PIN Node = 'ena'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "" { ena } "NODE_NAME" } "" } } { "cnt10.vhd" "" { Text "E:/日期/0517/fraq/cnt10/cnt10.vhd" 7 -1 0 } }  } 0} { "Info" "ITDB_NODE_DELAY" "IC(2.000 ns) + CELL(6.000 ns) 10.000 ns lpm_counter:cqi_rtl_0\|dffs\[1\] 2 REG LC11 8 " "Info: 2: + IC(2.000 ns) + CELL(6.000 ns) = 10.000 ns; Loc. = LC11; Fanout = 8; REG Node = 'lpm_counter:cqi_rtl_0\|dffs\[1\]'" {  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "8.000 ns" { ena lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "lpm_counter.tdf" "" { Text "c:/altera/quartus50/libraries/megafunctions/lpm_counter.tdf" 262 9 0 } }  } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "8.000 ns 80.00 % " "Info: Total cell delay = 8.000 ns ( 80.00 % )" {  } {  } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.000 ns 20.00 % " "Info: Total interconnect delay = 2.000 ns ( 20.00 % )" {  } {  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "10.000 ns" { ena lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.000 ns" { ena ena~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 2.000ns 6.000ns } } }  } 0}  } { { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "3.000 ns" { clk lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "3.000 ns" { clk clk~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 0.000ns } { 0.000ns 3.000ns 0.000ns } } } { "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" "" { Report "E:/日期/0517/fraq/cnt10/db/cnt10_cmp.qrpt" Compiler "cnt10" "UNKNOWN" "V1" "E:/日期/0517/fraq/cnt10/db/cnt10.quartus_db" { Floorplan "E:/日期/0517/fraq/cnt10/" "" "10.000 ns" { ena lpm_counter:cqi_rtl_0|dffs[1] } "NODE_NAME" } "" } } { "c:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "c:/altera/quartus50/bin/Technology_Viewer.qrui" "10.000 ns" { ena ena~out lpm_counter:cqi_rtl_0|dffs[1] } { 0.000ns 0.000ns 2.000ns } { 0.000ns 2.000ns 6.000ns } } }  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Timing Analyzer 0 s 1  Quartus II " "Info: Quartus II Timing Analyzer was successful. 0 errors, 1 warning" { { "Info" "IQEXE_END_BANNER_TIME" "Wed May 24 21:51:06 2006 " "Info: Processing ended: Wed May 24 21:51:06 2006" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:01 " "Info: Elapsed time: 00:00:01" {  } {  } 0}  } {  } 0}