📄 reg32b.sim.vwf

📁 基于VHDL语言的频率计具有高速计频
💻 VWF
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TRANSITION_LIST("din[1]")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 1;
			LEVEL 0 FOR 1000.0;
		}
		LEVEL 1 FOR 1000.0;
		LEVEL 0 FOR 2000.0;
		LEVEL 1 FOR 1000.0;
		LEVEL 0 FOR 45000.0;
	}
}

TRANSITION_LIST("din[0]")
{
	NODE
	{
		REPEAT = 1;
		NODE
		{
			REPEAT = 1;
			LEVEL 0 FOR 1000.0;
		}
		LEVEL 1 FOR 1000.0;
		LEVEL 0 FOR 48000.0;
	}
}

TRANSITION_LIST("dout[15]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 50000.0;
	}
}

TRANSITION_LIST("dout[14]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 4988.0;
		LEVEL 1 FOR 45012.0;
	}
}

TRANSITION_LIST("dout[13]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 50000.0;
	}
}

TRANSITION_LIST("dout[12]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 4988.0;
		LEVEL 1 FOR 45012.0;
	}
}

TRANSITION_LIST("dout[11]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1978.0;
		LEVEL 1 FOR 48022.0;
	}
}

TRANSITION_LIST("dout[10]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1978.0;
		LEVEL 1 FOR 3010.0;
		LEVEL 0 FOR 45012.0;
	}
}

TRANSITION_LIST("dout[9]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1978.0;
		LEVEL 1 FOR 48022.0;
	}
}

TRANSITION_LIST("dout[8]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1978.0;
		LEVEL 1 FOR 3010.0;
		LEVEL 0 FOR 45012.0;
	}
}

TRANSITION_LIST("dout[7]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 50000.0;
	}
}

TRANSITION_LIST("dout[6]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 4988.0;
		LEVEL 1 FOR 45012.0;
	}
}

TRANSITION_LIST("dout[5]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 4988.0;
		LEVEL 1 FOR 45012.0;
	}
}

TRANSITION_LIST("dout[4]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 50000.0;
	}
}

TRANSITION_LIST("dout[3]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1978.0;
		LEVEL 1 FOR 3010.0;
		LEVEL 0 FOR 45012.0;
	}
}

TRANSITION_LIST("dout[2]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1978.0;
		LEVEL 1 FOR 3010.0;
		LEVEL 0 FOR 45012.0;
	}
}

TRANSITION_LIST("dout[1]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1978.0;
		LEVEL 1 FOR 48022.0;
	}
}

TRANSITION_LIST("dout[0]")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 0 FOR 1978.0;
		LEVEL 1 FOR 3010.0;
		LEVEL 0 FOR 45012.0;
	}
}

TRANSITION_LIST("load")
{
	NODE
	{
		REPEAT = 1;
		LEVEL 1 FOR 1035.0;
		LEVEL 0 FOR 935.0;
		LEVEL 1 FOR 1075.0;
		LEVEL 0 FOR 1935.0;
		LEVEL 1 FOR 45020.0;
	}
}

DISPLAY_LINE
{
	CHANNEL = "din";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 0;
	TREE_LEVEL = 0;
	CHILDREN = 1, 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 16;
}

DISPLAY_LINE
{
	CHANNEL = "din[15]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 1;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[14]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 2;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[13]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 3;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[12]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 4;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[11]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 5;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[10]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 6;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[9]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 7;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[8]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 8;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 9;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 10;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 11;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 12;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 13;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 14;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 15;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "din[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 16;
	TREE_LEVEL = 1;
	PARENT = 0;
}

DISPLAY_LINE
{
	CHANNEL = "dout";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 17;
	TREE_LEVEL = 0;
	CHILDREN = 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33;
}

DISPLAY_LINE
{
	CHANNEL = "dout[15]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 18;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[14]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 19;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[13]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 20;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[12]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 21;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[11]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 22;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[10]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 23;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[9]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 24;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[8]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 25;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[7]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 26;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[6]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 27;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[5]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 28;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[4]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 29;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[3]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 30;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[2]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 31;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[1]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 32;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "dout[0]";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 33;
	TREE_LEVEL = 1;
	PARENT = 17;
}

DISPLAY_LINE
{
	CHANNEL = "load";
	EXPAND_STATUS = COLLAPSED;
	RADIX = Binary;
	TREE_INDEX = 34;
	TREE_LEVEL = 0;
}

TIME_BAR
{
	TIME = 11700;
	MASTER = TRUE;
}
;
上一页 12
💿 文件大小 486 K
👤 上传用户 xueyulanlian
📂 所属分类 VHDL/FPGA/Verilog
🏷️ 相关标签

#VHDL #语言 #频率计
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