top.rpt

dds信号发生器

|sin:30|divide:4|lpm_add_sub:1033|altshift:carry_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1033|altshift:oflow_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1079|
|sin:30|divide:4|lpm_add_sub:1079|addcore:adder|
|sin:30|divide:4|lpm_add_sub:1079|altshift:result_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1079|altshift:carry_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1079|altshift:oflow_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1125|
|sin:30|divide:4|lpm_add_sub:1125|addcore:adder|
|sin:30|divide:4|lpm_add_sub:1125|altshift:result_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1125|altshift:carry_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1125|altshift:oflow_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1171|
|sin:30|divide:4|lpm_add_sub:1171|addcore:adder|
|sin:30|divide:4|lpm_add_sub:1171|altshift:result_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1171|altshift:carry_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1171|altshift:oflow_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1217|
|sin:30|divide:4|lpm_add_sub:1217|addcore:adder|
|sin:30|divide:4|lpm_add_sub:1217|altshift:result_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1217|altshift:carry_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1217|altshift:oflow_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1263|
|sin:30|divide:4|lpm_add_sub:1263|addcore:adder|
|sin:30|divide:4|lpm_add_sub:1263|altshift:result_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1263|altshift:carry_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1263|altshift:oflow_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1309|
|sin:30|divide:4|lpm_add_sub:1309|addcore:adder|
|sin:30|divide:4|lpm_add_sub:1309|altshift:result_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1309|altshift:carry_ext_latency_ffs|
|sin:30|divide:4|lpm_add_sub:1309|altshift:oflow_ext_latency_ffs|
|sin:30|adder6b:23|
|sin:30|adder6b:23|lpm_add_sub:19|
|sin:30|adder6b:23|lpm_add_sub:19|addcore:adder|
|sin:30|adder6b:23|lpm_add_sub:19|altshift:result_ext_latency_ffs|
|sin:30|adder6b:23|lpm_add_sub:19|altshift:carry_ext_latency_ffs|
|sin:30|adder6b:23|lpm_add_sub:19|altshift:oflow_ext_latency_ffs|
|sin:30|reg6b:24|
|sin:30|sinrom1:25|
|sin:30|sinrom1:25|lpm_rom:4|
|sin:30|sinrom1:25|lpm_rom:4|altrom:srom|
|sin:30|adder26b:37|
|sin:30|adder26b:37|lpm_add_sub:91|
|sin:30|adder26b:37|lpm_add_sub:91|addcore:adder|
|sin:30|adder26b:37|lpm_add_sub:91|altshift:result_ext_latency_ffs|
|sin:30|adder26b:37|lpm_add_sub:91|altshift:carry_ext_latency_ffs|
|sin:30|adder26b:37|lpm_add_sub:91|altshift:oflow_ext_latency_ffs|
|sin:30|reg26b:38|
|sin:30|zhi:40|
|sin:30|mzh:41|
|sin:30|nzhi:42|
|sin:30|f26b:43|
|sin:30|fshow:47|
|sin:30|fshow:47|lpm_add_sub:189|
|sin:30|fshow:47|lpm_add_sub:189|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:189|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:189|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:189|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:246|
|sin:30|fshow:47|lpm_add_sub:246|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:246|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:246|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:246|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:261|
|sin:30|fshow:47|lpm_add_sub:261|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:261|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:261|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:261|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:584|
|sin:30|fshow:47|lpm_add_sub:584|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:584|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:584|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:584|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:641|
|sin:30|fshow:47|lpm_add_sub:641|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:641|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:641|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:641|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:656|
|sin:30|fshow:47|lpm_add_sub:656|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:656|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:656|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:656|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:979|
|sin:30|fshow:47|lpm_add_sub:979|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:979|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:979|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:979|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1036|
|sin:30|fshow:47|lpm_add_sub:1036|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:1036|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1036|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1036|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1051|
|sin:30|fshow:47|lpm_add_sub:1051|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:1051|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1051|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1051|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1374|
|sin:30|fshow:47|lpm_add_sub:1374|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:1374|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1374|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1374|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1431|
|sin:30|fshow:47|lpm_add_sub:1431|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:1431|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1431|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1431|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1446|
|sin:30|fshow:47|lpm_add_sub:1446|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:1446|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1446|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:1446|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:2573|
|sin:30|fshow:47|lpm_add_sub:2573|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:2573|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:2573|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:2573|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:2574|
|sin:30|fshow:47|lpm_add_sub:2574|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:2574|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:2574|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:2574|altshift:oflow_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:2575|
|sin:30|fshow:47|lpm_add_sub:2575|addcore:adder|
|sin:30|fshow:47|lpm_add_sub:2575|altshift:result_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:2575|altshift:carry_ext_latency_ffs|
|sin:30|fshow:47|lpm_add_sub:2575|altshift:oflow_ext_latency_ffs|


Device-Specific Information:                                    f:\sin\top.rpt
top

***** Logic for device 'top' compiled without errors.




Device: EPF10K20TC144-4

FLEX 10K Configuration Scheme: Passive Serial

Device Options:
    User-Supplied Start-Up Clock               = OFF
    Auto-Restart Configuration on Frame Error  = OFF
    Release Clears Before Tri-States           = OFF
    Enable Chip_Wide Reset                     = OFF
    Enable Chip-Wide Output Enable             = OFF
    Enable INIT_DONE Output                    = OFF
    JTAG User Code                             = 7f
    MultiVolt I/O                              = OFF



Device-Specific Information:                                    f:\sin\top.rpt
top

** ERROR SUMMARY **

Info: Chip 'top' in device 'EPF10K20TC144-4' has less than 20% of logic cells available for future logic changes -- if your project is likely to change, Altera recommends using a larger device
                                                                                         
                                                                                         
                R R R R R   R R R R   R R R R   R           R R R R R R R   R R R R R R  
                E E E E E   E E E E   E E E E   E           E E E E E E E   E E E E E E  
                S S S S S   S S S S   S S S S   S G G   G V S S S S S S S   S S S S S S  
                E E E E E G E E E E V E E E E G E N N   N C E E E E E E E V E E E E E E  
                R R R R R N R R R R C R R R R N R D D   D C R R R R R R R C R R R R R R  
                V V V V V D V V V V C V V V V D V I I c I I V V V V V V V C V V V V V V  
                E E E E E I E E E E I E E E E I E N N l N N E E E E E E E I E E E E E E  
                D D D D D O D D D D O D D D D O D T T k T T D D D D D D D O D D D D D D  
              --------------------------------------------------------------------------_ 
             / 144 142 140 138 136 134 132 130 128 126 124 122 120 118 116 114 112 110   |_ 
            /    143 141 139 137 135 133 131 129 127 125 123 121 119 117 115 113 111 109    | 
      #TCK |  1                                                                         108 | ^DATA0 
^CONF_DONE |  2                                                                         107 | ^DCLK 
     ^nCEO |  3                                                                         106 | ^nCE 
      #TDO |  4                                                                         105 | #TDI 
     VCCIO |  5                                                                         104 | GNDIO 
    VCCINT |  6                                                                         103 | GNDINT 
  RESERVED |  7                                                                         102 | RESERVED 
      clk0 |  8                                                                         101 | RESERVED 
      clk1 |  9                                                                         100 | RESERVED 
      clk2 | 10                                                                          99 | RESERVED 
  RESERVED | 11                                                                          98 | RESERVED 
      clk3 | 12                                                                          97 | RESERVED 
      clk4 | 13                                                                          96 | f15 
  RESERVED | 14                                                                          95 | f14 
     GNDIO | 15                                                                          94 | VCCIO 
    GNDINT | 16                                                                          93 | VCCINT 
      clk5 | 17                                                                          92 | f13 
  RESERVED | 18                                                                          91 | f12 
  RESERVED | 19                             EPF10K20TC144-4                              90 | f11 
  RESERVED | 20                                                                          89 | f10 
  RESERVED | 21                                                                          88 | f9 
  RESERVED | 22                                                                          87 | f8 
  RESERVED | 23                                                                          86 | f7 
     VCCIO | 24                                                                          85 | GNDIO 
    VCCINT | 25                                                                          84 | GNDINT