⭐ 欢迎来到虫虫下载站! | 📦 资源下载 📁 资源专辑 ℹ️ 关于我们
⭐ 虫虫下载站

📄 zaibo.rpt

📁 dds信号发生器
💻 RPT
📖 第 1 页 / 共 3 页
字号:

-- Node name is 'zaibo2' 
-- Equation name is 'zaibo2', type is output 
zaibo2   =  _EC6_B;

-- Node name is 'zaibo3' 
-- Equation name is 'zaibo3', type is output 
zaibo3   =  _EC15_B;

-- Node name is 'zaibo4' 
-- Equation name is 'zaibo4', type is output 
zaibo4   =  _EC5_B;

-- Node name is 'zaibo5' 
-- Equation name is 'zaibo5', type is output 
zaibo5   =  _EC9_B;

-- Node name is 'zaibo6' 
-- Equation name is 'zaibo6', type is output 
zaibo6   =  _EC8_B;

-- Node name is 'zaibo7' 
-- Equation name is 'zaibo7', type is output 
zaibo7   =  _EC13_B;

-- Node name is '|cnt10:9|7490:1|:7' = '|cnt10:9|7490:1|QA' 
-- Equation name is '_LC7_B13', type is buried 
_LC7_B13 = DFFE(!_LC7_B13, !_LC1_B17,  VCC,  VCC,  VCC);

-- Node name is '|cnt10:9|7490:1|:11' = '|cnt10:9|7490:1|QB' 
-- Equation name is '_LC3_B17', type is buried 
_LC3_B17 = DFFE( _EQ001, GLOBAL(!clk),  VCC,  VCC,  VCC);
  _EQ001 = !_LC1_B17 & !_LC3_B17;

-- Node name is '|cnt10:9|7490:1|:14' = '|cnt10:9|7490:1|QC' 
-- Equation name is '_LC2_B17', type is buried 
_LC2_B17 = DFFE( _EQ002, GLOBAL(!clk),  VCC,  VCC,  VCC);
  _EQ002 = !_LC2_B17 &  _LC3_B17
         #  _LC2_B17 & !_LC3_B17;

-- Node name is '|cnt10:9|7490:1|:19' = '|cnt10:9|7490:1|QD' 
-- Equation name is '_LC1_B17', type is buried 
_LC1_B17 = DFFE( _EQ003, GLOBAL(!clk),  VCC,  VCC,  VCC);
  _EQ003 =  _LC2_B17 &  _LC3_B17;

-- Node name is '|LPM_COUNTER:5|f8count:p8c0|:8' = '|LPM_COUNTER:5|f8count:p8c0|QA' 
-- Equation name is '_LC4_B13', type is buried 
_LC4_B13 = DFFE(!_LC4_B13,  _LC7_B13,  VCC,  VCC,  VCC);

-- Node name is '|LPM_COUNTER:5|f8count:p8c0|:7' = '|LPM_COUNTER:5|f8count:p8c0|QB' 
-- Equation name is '_LC1_B13', type is buried 
_LC1_B13 = DFFE( _EQ004,  _LC7_B13,  VCC,  VCC,  VCC);
  _EQ004 = !_LC1_B13 &  _LC4_B13
         #  _LC1_B13 & !_LC4_B13;

-- Node name is '|LPM_COUNTER:5|f8count:p8c0|:6' = '|LPM_COUNTER:5|f8count:p8c0|QC' 
-- Equation name is '_LC2_B13', type is buried 
_LC2_B13 = DFFE( _EQ005,  _LC7_B13,  VCC,  VCC,  VCC);
  _EQ005 =  _LC2_B13 & !_LC4_B13
         # !_LC1_B13 &  _LC2_B13
         #  _LC1_B13 & !_LC2_B13 &  _LC4_B13;

-- Node name is '|LPM_COUNTER:5|f8count:p8c0|:5' = '|LPM_COUNTER:5|f8count:p8c0|QD' 
-- Equation name is '_LC3_B13', type is buried 
_LC3_B13 = DFFE( _EQ006,  _LC7_B13,  VCC,  VCC,  VCC);
  _EQ006 = !_LC2_B13 &  _LC3_B13
         #  _LC3_B13 & !_LC4_B13
         # !_LC1_B13 &  _LC3_B13
         #  _LC1_B13 &  _LC2_B13 & !_LC3_B13 &  _LC4_B13;

-- Node name is '|LPM_COUNTER:5|f8count:p8c0|:4' = '|LPM_COUNTER:5|f8count:p8c0|QE' 
-- Equation name is '_LC5_B13', type is buried 
_LC5_B13 = DFFE( _EQ007,  _LC7_B13,  VCC,  VCC,  VCC);
  _EQ007 = !_LC3_B13 &  _LC5_B13
         #  _LC5_B13 & !_LC8_B13
         #  _LC3_B13 & !_LC5_B13 &  _LC8_B13;

-- Node name is '|LPM_COUNTER:5|f8count:p8c0|:3' = '|LPM_COUNTER:5|f8count:p8c0|QF' 
-- Equation name is '_LC6_B13', type is buried 
_LC6_B13 = DFFE( _EQ008,  _LC7_B13,  VCC,  VCC,  VCC);
  _EQ008 = !_LC5_B13 &  _LC6_B13
         # !_LC3_B13 &  _LC6_B13
         #  _LC6_B13 & !_LC8_B13
         #  _LC3_B13 &  _LC5_B13 & !_LC6_B13 &  _LC8_B13;

-- Node name is '|LPM_COUNTER:5|f8count:p8c0|:289' 
-- Equation name is '_LC8_B13', type is buried 
_LC8_B13 = LCELL( _EQ009);
  _EQ009 =  _LC1_B13 &  _LC2_B13 &  _LC4_B13;

-- Node name is '|sinrom2:1|LPM_ROM:3|altrom:srom|segment0_0' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC3_B', type is memory 
_EC3_B   = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, VCC, VCC, VCC);

-- Node name is '|sinrom2:1|LPM_ROM:3|altrom:srom|segment0_1' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC10_B', type is memory 
_EC10_B  = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, VCC, VCC, VCC);

-- Node name is '|sinrom2:1|LPM_ROM:3|altrom:srom|segment0_2' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC6_B', type is memory 
_EC6_B   = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, VCC, VCC, VCC);

-- Node name is '|sinrom2:1|LPM_ROM:3|altrom:srom|segment0_3' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC15_B', type is memory 
_EC15_B  = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, VCC, VCC, VCC);

-- Node name is '|sinrom2:1|LPM_ROM:3|altrom:srom|segment0_4' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC5_B', type is memory 
_EC5_B   = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, VCC, VCC, VCC);

-- Node name is '|sinrom2:1|LPM_ROM:3|altrom:srom|segment0_5' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC9_B', type is memory 
_EC9_B   = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, VCC, VCC, VCC);

-- Node name is '|sinrom2:1|LPM_ROM:3|altrom:srom|segment0_6' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC8_B', type is memory 
_EC8_B   = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, VCC, VCC, VCC);

-- Node name is '|sinrom2:1|LPM_ROM:3|altrom:srom|segment0_7' from file "altrom.tdf" line 92, column 11
-- Equation name is '_EC13_B', type is memory 
_EC13_B  = MEMORY_SEGMENT( VCC, VCC, VCC, GND, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, _LC4_B13, _LC1_B13, _LC2_B13, _LC3_B13, _LC5_B13, _LC6_B13, VCC, VCC, VCC, VCC, VCC, VCC, VCC, VCC);



Project Information                                    e:\edashi\sin\zaibo.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Multi-Level

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'FLEX10KE' family

      CARRY_CHAIN                         = ignore
      CARRY_CHAIN_LENGTH                  = 32
      CASCADE_CHAIN                       = ignore
      CASCADE_CHAIN_LENGTH                = 2
      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SUBFACTOR_EXTRACTION                = on
      IGNORE_SOFT_BUFFERS                 = on
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Use Quartus Fitter                        = on
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:00
   Fitter                                 00:00:02
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:02


Memory Allocated
-----------------

Peak memory allocated during compilation  = 41,516K

⌨️ 快捷键说明

复制代码 Ctrl + C
搜索代码 Ctrl + F
全屏模式 F11
切换主题 Ctrl + Shift + D
显示快捷键 ?
增大字号 Ctrl + =
减小字号 Ctrl + -