📄 f26b.rpt
字号:
68 - - A -- OUTPUT 0 1 0 0 f26b4
70 - - A -- OUTPUT 0 1 0 0 f26b5
71 - - A -- OUTPUT 0 1 0 0 f26b6
69 - - A -- OUTPUT 0 1 0 0 f26b7
62 - - B -- OUTPUT 0 1 0 0 f26b8
58 - - C -- OUTPUT 0 1 0 0 f26b9
77 - - - 01 OUTPUT 0 1 0 0 f26b10
5 - - A -- OUTPUT 0 1 0 0 f26b11
55 - - C -- OUTPUT 0 1 0 0 f26b12
61 - - B -- OUTPUT 0 1 0 0 f26b13
34 - - - 14 OUTPUT 0 1 0 0 f26b14
82 - - - 04 OUTPUT 0 1 0 0 f26b15
8 - - A -- OUTPUT 0 1 0 0 f26b16
78 - - - 01 OUTPUT 0 1 0 0 f26b17
63 - - B -- OUTPUT 0 1 0 0 f26b18
65 - - B -- OUTPUT 0 1 0 0 f26b19
46 - - - 10 OUTPUT 0 1 0 0 f26b20
10 - - A -- OUTPUT 0 1 0 0 f26b21
80 - - - 03 OUTPUT 0 1 0 0 f26b22
6 - - A -- OUTPUT 0 1 0 0 f26b23
50 - - - 02 OUTPUT 0 1 0 0 f26b24
57 - - C -- OUTPUT 0 1 0 0 f26b25
56 - - C -- OUTPUT 0 1 0 0 f26b26
47 - - - 09 OUTPUT 0 1 0 0 f26b27
9 - - A -- OUTPUT 0 1 0 0 f26b28
64 - - B -- OUTPUT 0 1 0 0 f26b29
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
@ = Uses single-pin Clock Enable
& = Uses single-pin Output Enable
Device-Specific Information: f:\sin\f26b.rpt
f26b
** BURIED LOGIC **
Fan-In Fan-Out
IOC LC EC Row Col Primitive Code INP FBK OUT FBK Name
- 2 - B 10 AND2 2 0 1 0 :316
- 6 - A 14 AND2 2 0 1 0 :322
- 7 - B 10 AND2 2 0 1 0 :328
- 5 - C 03 AND2 2 0 1 0 :334
- 3 - C 03 OR2 2 0 1 0 :339
- 2 - A 01 AND2 2 0 1 0 :346
- 2 - A 14 AND2 2 0 1 0 :352
- 8 - C 03 AND2 2 0 1 0 :358
- 8 - A 14 OR2 2 0 1 0 :363
- 5 - B 10 AND2 2 0 1 0 :370
- 1 - B 10 AND2 2 0 1 0 :376
- 4 - B 10 AND2 2 0 1 0 :382
- 4 - A 01 OR2 2 0 1 0 :387
- 5 - A 14 AND2 2 0 1 0 :394
- 4 - C 03 AND2 2 0 1 0 :400
- 4 - A 14 AND2 2 0 1 0 :406
- 8 - B 10 OR2 2 0 1 0 :411
- 7 - C 03 AND2 2 0 1 0 :418
- 1 - A 14 AND2 2 0 1 0 :424
- 6 - A 01 AND2 2 0 1 0 :430
- 1 - C 03 OR2 2 0 1 0 :435
- 6 - B 10 AND2 2 0 1 0 :442
- 5 - A 01 AND2 2 0 1 0 :448
- 1 - A 01 AND2 2 0 1 0 :454
- 3 - A 01 OR2 2 0 1 0 :459
- 7 - A 01 AND2 2 0 1 0 :466
- 3 - B 10 AND2 2 0 1 0 :472
- 3 - A 14 AND2 2 0 1 0 :478
- 8 - A 01 OR2 2 0 1 0 :483
- 7 - A 14 AND2 2 0 1 0 :490
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
^ = Increased input delay
* = PCI I/O is enabled
p = Packed register
Device-Specific Information: f:\sin\f26b.rpt
f26b
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 3/ 96( 3%) 8/ 48( 16%) 11/ 48( 22%) 0/16( 0%) 10/16( 62%) 0/16( 0%)
B: 5/ 96( 5%) 7/ 48( 14%) 0/ 48( 0%) 4/16( 25%) 5/16( 31%) 0/16( 0%)
C: 7/ 96( 7%) 3/ 48( 6%) 0/ 48( 0%) 5/16( 31%) 4/16( 25%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
02: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
03: 2/24( 8%) 1/4( 25%) 1/4( 25%) 0/4( 0%)
04: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
05: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
06: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
07: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
08: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
09: 2/24( 8%) 0/4( 0%) 2/4( 50%) 0/4( 0%)
10: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
11: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
12: 2/24( 8%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
13: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
14: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
15: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
16: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
17: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
19: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
20: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
21: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
22: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 1/24( 4%) 1/4( 25%) 0/4( 0%) 0/4( 0%)
24: 2/24( 8%) 2/4( 50%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: f:\sin\f26b.rpt
f26b
** EQUATIONS **
m0 : INPUT;
m1 : INPUT;
m2 : INPUT;
m3 : INPUT;
m4 : INPUT;
m5 : INPUT;
m6 : INPUT;
m7 : INPUT;
m8 : INPUT;
m9 : INPUT;
m10 : INPUT;
m11 : INPUT;
m12 : INPUT;
m13 : INPUT;
m14 : INPUT;
m15 : INPUT;
m16 : INPUT;
m17 : INPUT;
m18 : INPUT;
m19 : INPUT;
m20 : INPUT;
m21 : INPUT;
m22 : INPUT;
m23 : INPUT;
m24 : INPUT;
m25 : INPUT;
m26 : INPUT;
m27 : INPUT;
m28 : INPUT;
m29 : INPUT;
q1 : INPUT;
-- Node name is 'f26b0'
-- Equation name is 'f26b0', type is output
f26b0 = _LC7_A14;
-- Node name is 'f26b1'
-- Equation name is 'f26b1', type is output
f26b1 = _LC8_A1;
-- Node name is 'f26b2'
-- Equation name is 'f26b2', type is output
f26b2 = _LC3_A14;
-- Node name is 'f26b3'
-- Equation name is 'f26b3', type is output
f26b3 = _LC3_B10;
-- Node name is 'f26b4'
-- Equation name is 'f26b4', type is output
f26b4 = _LC7_A1;
-- Node name is 'f26b5'
-- Equation name is 'f26b5', type is output
f26b5 = _LC3_A1;
-- Node name is 'f26b6'
-- Equation name is 'f26b6', type is output
f26b6 = _LC1_A1;
-- Node name is 'f26b7'
-- Equation name is 'f26b7', type is output
f26b7 = _LC5_A1;
-- Node name is 'f26b8'
-- Equation name is 'f26b8', type is output
f26b8 = _LC6_B10;
-- Node name is 'f26b9'
-- Equation name is 'f26b9', type is output
f26b9 = _LC1_C3;
-- Node name is 'f26b10'
-- Equation name is 'f26b10', type is output
f26b10 = _LC6_A1;
-- Node name is 'f26b11'
-- Equation name is 'f26b11', type is output
f26b11 = _LC1_A14;
-- Node name is 'f26b12'
-- Equation name is 'f26b12', type is output
f26b12 = _LC7_C3;
-- Node name is 'f26b13'
-- Equation name is 'f26b13', type is output
f26b13 = _LC8_B10;
-- Node name is 'f26b14'
-- Equation name is 'f26b14', type is output
f26b14 = _LC4_A14;
-- Node name is 'f26b15'
-- Equation name is 'f26b15', type is output
f26b15 = _LC4_C3;
-- Node name is 'f26b16'
-- Equation name is 'f26b16', type is output
f26b16 = _LC5_A14;
-- Node name is 'f26b17'
-- Equation name is 'f26b17', type is output
f26b17 = _LC4_A1;
-- Node name is 'f26b18'
-- Equation name is 'f26b18', type is output
f26b18 = _LC4_B10;
-- Node name is 'f26b19'
-- Equation name is 'f26b19', type is output
f26b19 = _LC1_B10;
-- Node name is 'f26b20'
-- Equation name is 'f26b20', type is output
f26b20 = _LC5_B10;
-- Node name is 'f26b21'
-- Equation name is 'f26b21', type is output
f26b21 = _LC8_A14;
-- Node name is 'f26b22'
-- Equation name is 'f26b22', type is output
f26b22 = _LC8_C3;
-- Node name is 'f26b23'
-- Equation name is 'f26b23', type is output
f26b23 = _LC2_A14;
-- Node name is 'f26b24'
-- Equation name is 'f26b24', type is output
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