📄 fshow.rpt
字号:
- 5 - B 02 DFFE + 0 3 0 6 m24 (:54)
- 1 - B 03 DFFE + 0 2 0 7 m23 (:55)
- 2 - B 03 DFFE + 0 0 0 8 m22 (:56)
- 7 - D 22 DFFE + 0 0 0 2 m21 (:57)
- 1 - D 20 DFFE + 0 0 0 6 m20 (:58)
- 3 - C 21 DFFE + 0 3 0 3 f13~71 (:59)
- 4 - C 21 DFFE + 0 3 0 4 f12~71 (:60)
- 5 - C 21 DFFE + 0 2 0 5 f11~71 (:61)
- 1 - E 24 DFFE + 0 0 0 6 f10~71 (:62)
- 3 - B 14 DFFE + 0 3 0 1 m19 (:63)
- 1 - B 21 DFFE + 0 3 0 4 m18 (:64)
- 2 - B 21 DFFE + 0 3 0 4 m17 (:65)
- 2 - D 21 DFFE + 0 3 0 4 m16 (:66)
- 5 - D 21 DFFE + 0 3 0 4 m15 (:67)
- 3 - D 21 DFFE + 0 3 0 4 m14 (:68)
- 1 - D 19 DFFE + 0 3 0 6 m13 (:69)
- 8 - D 19 DFFE + 0 2 0 7 m12 (:70)
- 2 - D 19 DFFE + 0 0 0 8 m11 (:71)
- 1 - D 05 DFFE + 0 0 0 4 m10 (:72)
- 5 - D 15 DFFE + 0 3 0 4 f03 (:73)
- 3 - D 15 DFFE + 0 2 0 5 f02 (:74)
- 1 - D 15 DFFE + 0 3 0 5 f01 (:75)
- 1 - D 17 DFFE + 0 0 0 6 f00 (:76)
- 7 - B 14 DFFE + 0 3 0 1 m09 (:77)
- 2 - B 14 DFFE + 0 3 0 4 m08 (:78)
- 1 - B 17 DFFE + 0 3 0 4 m07 (:79)
- 3 - B 17 DFFE + 0 3 0 4 m06 (:80)
- 7 - B 17 DFFE + 0 3 0 4 m05 (:81)
- 6 - D 23 DFFE + 0 3 0 4 m04 (:82)
- 2 - D 23 DFFE + 0 3 0 4 m03 (:83)
- 4 - D 24 DFFE + 0 3 0 6 m02 (:84)
- 8 - D 24 DFFE + 0 2 0 7 m01 (:85)
- 6 - D 24 DFFE + 0 0 0 8 m00 (:86)
- 1 - B 07 OR2 ! 0 2 0 5 :150
- 1 - C 19 OR2 ! 0 4 0 7 :545
- 2 - C 21 AND2 0 4 0 10 :940
- 6 - D 15 OR2 ! 0 4 0 9 :1335
- 8 - C 21 OR2 s 0 2 0 1 ~1823~1
- 6 - B 20 OR2 ! 0 3 0 12 :1823
- 1 - B 20 OR2 s 0 3 0 7 ~1914~1
- 3 - B 20 OR2 ! 0 4 0 20 :1914
- 7 - C 21 OR2 s 0 4 0 1 ~1934~1
- 6 - C 21 OR2 s 0 4 0 3 ~1934~2
- 8 - D 15 AND2 s ! 0 4 0 1 ~1934~3
- 4 - B 20 OR2 0 4 1 0 :2243
- 5 - C 13 AND2 0 2 1 0 :2252
- 2 - C 19 AND2 0 2 1 0 :2261
- 5 - C 19 AND2 0 2 1 0 :2270
- 7 - C 19 AND2 0 2 1 0 :2279
- 3 - C 13 AND2 0 2 1 0 :2288
- 4 - C 13 AND2 0 2 1 0 :2297
- 1 - C 21 AND2 0 2 1 0 :2306
- 5 - D 17 OR2 0 3 1 0 :2313
- 2 - D 15 AND2 0 3 1 0 :2324
- 7 - D 15 AND2 0 3 1 0 :2333
- 4 - D 15 AND2 0 3 1 0 :2342
- 6 - D 17 AND2 0 3 1 0 :2351
- 7 - B 15 OR2 0 4 1 0 :2360
- 1 - B 15 OR2 0 4 1 0 :2369
- 5 - B 23 OR2 0 4 1 0 :2378
- 2 - B 23 OR2 0 4 1 0 :2387
- 4 - D 17 OR2 0 4 1 0 :2396
- 8 - D 14 OR2 0 4 1 0 :2405
- 1 - D 14 OR2 0 4 1 0 :2412
- 5 - D 14 OR2 0 4 1 0 :2423
- 2 - D 24 OR2 0 3 1 0 :2430
- 3 - D 14 AND2 s 0 2 0 4 ~2441~1
- 7 - D 24 OR2 0 3 1 0 :2441
Code:
s = Synthesized pin or logic cell
+ = Synchronous flipflop
/ = Slow slew-rate output
! = NOT gate push-back
r = Fitter-inserted logic cell
p = Packed register
Device-Specific Information: f:\sin\fshow.rpt
fshow
** FASTTRACK INTERCONNECT UTILIZATION **
Row FastTrack Interconnect:
Global Left Half- Right Half-
FastTrack FastTrack FastTrack
Row Interconnect Interconnect Interconnect Input Pins Output Pins Bidir Pins
A: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
B: 21/ 96( 21%) 16/ 48( 33%) 22/ 48( 45%) 0/16( 0%) 5/16( 31%) 0/16( 0%)
C: 4/ 96( 4%) 0/ 48( 0%) 11/ 48( 22%) 0/16( 0%) 7/16( 43%) 0/16( 0%)
D: 13/ 96( 13%) 0/ 48( 0%) 33/ 48( 68%) 0/16( 0%) 8/16( 50%) 0/16( 0%)
E: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
F: 0/ 96( 0%) 0/ 48( 0%) 0/ 48( 0%) 0/16( 0%) 0/16( 0%) 0/16( 0%)
Column FastTrack Interconnect:
FastTrack
Column Interconnect Input Pins Output Pins Bidir Pins
01: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
02: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
03: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
04: 3/24( 12%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
05: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
06: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
07: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
08: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
09: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
10: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
11: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
12: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
13: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
14: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
15: 2/24( 8%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
16: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
17: 3/24( 12%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
18: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
19: 1/24( 4%) 0/4( 0%) 1/4( 25%) 0/4( 0%)
20: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
21: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
22: 4/24( 16%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
23: 1/24( 4%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
24: 2/24( 8%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
EA: 0/24( 0%) 0/4( 0%) 0/4( 0%) 0/4( 0%)
Device-Specific Information: f:\sin\fshow.rpt
fshow
** CLOCK SIGNALS **
Type Fan-out Name
INPUT 14 clk0
INPUT 14 clk1
INPUT 14 clk2
INPUT 14 clk3
Device-Specific Information: f:\sin\fshow.rpt
fshow
** EQUATIONS **
clk0 : INPUT;
clk1 : INPUT;
clk2 : INPUT;
clk3 : INPUT;
-- Node name is 'f0'
-- Equation name is 'f0', type is output
f0 = _LC6_D17;
-- Node name is ':76' = 'f00'
-- Equation name is 'f00', location is LC1_D17, type is buried.
f00 = DFFE(!f00, GLOBAL( clk0), VCC, VCC, VCC);
-- Node name is ':75' = 'f01'
-- Equation name is 'f01', location is LC1_D15, type is buried.
f01 = DFFE( _EQ001, GLOBAL( clk0), VCC, VCC, VCC);
_EQ001 = !f00 & f01
# f00 & !f01 & !f03
# f00 & !f01 & f02;
-- Node name is 'f1'
-- Equation name is 'f1', type is output
f1 = _LC4_D15;
-- Node name is ':74' = 'f02'
-- Equation name is 'f02', location is LC3_D15, type is buried.
f02 = DFFE( _EQ002, GLOBAL( clk0), VCC, VCC, VCC);
_EQ002 = !f01 & f02
# !f00 & f02
# f00 & f01 & !f02;
-- Node name is 'f2'
-- Equation name is 'f2', type is output
f2 = _LC7_D15;
-- Node name is ':73' = 'f03'
-- Equation name is 'f03', location is LC5_D15, type is buried.
f03 = DFFE( _EQ003, GLOBAL( clk0), VCC, VCC, VCC);
_EQ003 = !f00 & f03
# f00 & f01 & f02 & !f03
# !f01 & f02 & f03
# f01 & !f02 & f03;
-- Node name is 'f3'
-- Equation name is 'f3', type is output
f3 = _LC2_D15;
-- Node name is 'f4'
-- Equation name is 'f4', type is output
f4 = _LC5_D17;
-- Node name is 'f5'
-- Equation name is 'f5', type is output
f5 = _LC1_C21;
-- Node name is 'f6'
-- Equation name is 'f6', type is output
f6 = _LC4_C13;
-- Node name is 'f7'
-- Equation name is 'f7', type is output
f7 = _LC3_C13;
-- Node name is 'f8'
-- Equation name is 'f8', type is output
f8 = _LC7_C19;
-- Node name is 'f9'
-- Equation name is 'f9', type is output
f9 = _LC5_C19;
-- Node name is ':62' = 'f10~71'
-- Equation name is 'f10~71', location is LC1_E24, type is buried.
f10~71 = DFFE(!f10~71, GLOBAL( clk1), VCC, VCC, VCC);
-- Node name is 'f10'
-- Equation name is 'f10', type is output
f10 = _LC2_C19;
-- Node name is ':61' = 'f11~71'
-- Equation name is 'f11~71', location is LC5_C21, type is buried.
f11~71 = DFFE( _EQ004, GLOBAL( clk1), VCC, VCC, VCC);
_EQ004 = !f10~71 & f11~71 & !_LC2_C21
# f10~71 & !f11~71 & !_LC2_C21;
-- Node name is 'f11'
-- Equation name is 'f11', type is output
f11 = _LC5_C13;
-- Node name is ':60' = 'f12~71'
-- Equation name is 'f12~71', location is LC4_C21, type is buried.
f12~71 = DFFE( _EQ005, GLOBAL( clk1), VCC, VCC, VCC);
_EQ005 = !f11~71 & f12~71 & !_LC2_C21
# !f10~71 & f12~71 & !_LC2_C21
# f10~71 & f11~71 & !f12~71 & !_LC2_C21;
-- Node name is 'f12'
-- Equation name is 'f12', type is output
f12 = _LC4_B20;
-- Node name is ':59' = 'f13~71'
-- Equation name is 'f13~71', location is LC3_C21, type is buried.
f13~71 = DFFE( _EQ006, GLOBAL( clk1), VCC, VCC, VCC);
_EQ006 = !f10~71 & f13~71
# f10~71 & f11~71 & f12~71 & !f13~71
# !f11~71 & f12~71 & f13~71
# f11~71 & !f12~71 & f13~71;
-- Node name is 'f13'
-- Equation name is 'f13', type is output
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