nzhi.vhd

dds信号发生器

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;
entity nzhi is
port(n:out std_logic_vector(26 downto 0));
end;
architecture one of nzhi is
begin
n<="100000000000000000000000000";
end;