digitalclock.txt

此文件是FPGA中数字时钟开发

数字时钟

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_arith.all;
use ieee.std_logic_unsigned.all;

 entity time_test is
  port(clk,rst,pause,cs,ale:in std_logic;
       data:in integer range 0 to 59;
       q1,q2,q3:out integer range 0 to 59);
    end time_test;
architecture behav of time_test is

 

signal clk15,sec_out,min_out:std_logic;

signal second,minture:integer range 0 to 59;

signal hour:integer range 0 to 23;

signal counter :integer range 0 to 14;

begin


------------------计数模块----------------------------------------------------------------------------------------

-----15分频 OSC4输入15HZ输出 clk15:1HZ,占空比为1/15,当pause='1'时暂停输出
clk_div15:process(clk,pause)
      begin
   if pause='0' then
     if rising_edge(clk) then 
       if(counter=14) then
          clk15<='1';
          counter<=0;
        else counter<=counter+1;
             clk15<='0';   
       end if;
      end if;
   end if;
end process clk_div15;


--秒计数
sec: process(clk15,rst)
    begin
     if(rst='1') then second<=0; 
        elsif rising_edge(clk15) then 
        if second=59 then 
            second<=0;sec_out<='1';
        else second<=second+1;
             sec_out<='0'; 
        end if;
      end if;
  end process sec;

-- 60进制计数器,用于分计数
 min: process(sec_out,rst,cs)
    begin
     if(rst='1') then minture<=0; --异步复位且优先级高于置数
       elsif (cs='1'and ale='0') then minture<=data;--异步置数 
          elsif rising_edge(sec_out) then 
                 if   minture=59 then 
                      minture<=0;min_out<='1';
                else minture<=minture+1;
                     min_out<='0'; 
                end if;
      end if;             
  end process min;

-- 24进制计数器,用于小时计数
 hou: process(min_out,rst,cs)
    begin
    if(rst='1') then hour<=0;--异步复位
     elsif(cs='1' and ale='1')then hour<=data;
        elsif rising_edge(min_out) then 
                if(hour=23) then hour<=0;
                else hour<=hour+1;
                end if;
     end if;             
end process hou;
 q1<=hour; q2<=minture;q3<=second;

end behav;

 在时序仿真时出现严重的毛刺,一般在10ns范围内，一时找不出原因,有哪位高手看到请指教。