selec.vhd

来自「一个用VHDL编写的在CPLD上实现模拟交通灯的程序源代码」· VHDL 代码 · 共 27 行

library ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

entity selec is
port( clk_scan  :  in  std_logic;
      sel       :  out std_logic_vector(2 downto 0) 
     );
end  selec;

architecture  behave  of  selec  is
signal  cnt  :std_logic_vector(2 downto 0);
begin
    sel<=cnt;
    process(clk_scan)
    begin
       if  rising_edge(clk_scan)  then
          if(cnt="001")  then cnt<="110";
          elsif(cnt="111") then cnt<="000";
          else  cnt<=cnt+1;
          end if;
       end if;
    end  process;
  
end  behave;