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📄 bahe.tan.qmsg

📁 设计四 拔河游戏机 1、 设计一个能进行拔河游戏的电路。 2、 电路使用15个(或9个)发光二极管
💻 QMSG
📖 第 1 页 / 共 4 页
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{ "Info" "IDAT_DAT_COMPLETED" "" "Info: Delay annotation completed successfully" {  } {  } 0 0 "Delay annotation completed successfully" 0 0}
{ "Warning" "WTAN_ANALYZE_COMB_LATCHES" "" "Warning: Timing Analysis is analyzing one or more combinational loops as latches" { { "Warning" "WTAN_COMB_LATCH_NODE" "Debunce:u3\|DLY_OUT " "Warning: Node \"Debunce:u3\|DLY_OUT\" is a latch" {  } { { "Debunce.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/Debunce.vhd" 17 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "Debunce:u1\|DLY_OUT " "Warning: Node \"Debunce:u1\|DLY_OUT\" is a latch" {  } { { "Debunce.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/Debunce.vhd" 17 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "Debunce:u2\|DLY_OUT " "Warning: Node \"Debunce:u2\|DLY_OUT\" is a latch" {  } { { "Debunce.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/Debunce.vhd" 17 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[1\] " "Warning: Node \"lamper\[1\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[2\] " "Warning: Node \"lamper\[2\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[3\] " "Warning: Node \"lamper\[3\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[4\] " "Warning: Node \"lamper\[4\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[5\] " "Warning: Node \"lamper\[5\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[6\] " "Warning: Node \"lamper\[6\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[7\] " "Warning: Node \"lamper\[7\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[8\] " "Warning: Node \"lamper\[8\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[9\] " "Warning: Node \"lamper\[9\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[10\] " "Warning: Node \"lamper\[10\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[11\] " "Warning: Node \"lamper\[11\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[12\] " "Warning: Node \"lamper\[12\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0} { "Warning" "WTAN_COMB_LATCH_NODE" "lamper\[13\] " "Warning: Node \"lamper\[13\]\" is a latch" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 102 -1 0 } }  } 0 0 "Node \"%1!s!\" is a latch" 0 0}  } {  } 0 0 "Timing Analysis is analyzing one or more combinational loops as latches" 0 0}
{ "Warning" "WTAN_NO_CLOCKS" "" "Warning: Found pins functioning as undefined clocks and/or memory enables" { { "Info" "ITAN_NODE_MAP_TO_CLK" "clk_4m " "Info: Assuming node \"clk_4m\" is an undefined clock" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 7 -1 0 } } { "d:/altera/quartus51sp2/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51sp2/bin/Assignment Editor.qase" 1 { { 0 "clk_4m" } } } }  } 0 0 "Assuming node \"%1!s!\" is an undefined clock" 0 0}  } {  } 0 0 "Found pins functioning as undefined clocks and/or memory enables" 0 0}
{ "Warning" "WTAN_RIPPLE_OR_GATED_CLOCKS_FOUND" "7 " "Warning: Found 7 node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" { { "Info" "ITAN_GATED_CLK" "Mux~202 " "Info: Detected gated clock \"Mux~202\" as buffer" {  } { { "d:/altera/quartus51sp2/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51sp2/bin/Assignment Editor.qase" 1 { { 0 "Mux~202" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "qp\[1\] " "Info: Detected ripple clock \"qp\[1\]\" as buffer" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 91 -1 0 } } { "d:/altera/quartus51sp2/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51sp2/bin/Assignment Editor.qase" 1 { { 0 "qp\[1\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "qp\[2\] " "Info: Detected ripple clock \"qp\[2\]\" as buffer" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 91 -1 0 } } { "d:/altera/quartus51sp2/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51sp2/bin/Assignment Editor.qase" 1 { { 0 "qp\[2\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "qp\[0\] " "Info: Detected ripple clock \"qp\[0\]\" as buffer" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 91 -1 0 } } { "d:/altera/quartus51sp2/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51sp2/bin/Assignment Editor.qase" 1 { { 0 "qp\[0\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_RIPPLE_CLK" "qp\[3\] " "Info: Detected ripple clock \"qp\[3\]\" as buffer" {  } { { "bahe.vhd" "" { Text "F:/EDA/拔河游戏机/bahe/bahe.vhd" 91 -1 0 } } { "d:/altera/quartus51sp2/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51sp2/bin/Assignment Editor.qase" 1 { { 0 "qp\[3\]" } } } }  } 0 0 "Detected ripple clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "Equal~211 " "Info: Detected gated clock \"Equal~211\" as buffer" {  } { { "d:/altera/quartus51sp2/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51sp2/bin/Assignment Editor.qase" 1 { { 0 "Equal~211" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0} { "Info" "ITAN_GATED_CLK" "Equal~210 " "Info: Detected gated clock \"Equal~210\" as buffer" {  } { { "d:/altera/quartus51sp2/bin/Assignment Editor.qase" "" { Assignment "d:/altera/quartus51sp2/bin/Assignment Editor.qase" 1 { { 0 "Equal~210" } } } }  } 0 0 "Detected gated clock \"%1!s!\" as buffer" 0 0}  } {  } 0 0 "Found %1!d! node(s) in clock paths which may be acting as ripple and/or gated clocks -- node(s) analyzed as buffer(s) resulting in clock skew" 0 0}

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