bahe.rpp.talkback.xml

设计四 拔河游戏机 1、 设计一个能进行拔河游戏的电路。 2、 电路使用15个(或9个)发光二极管

		<default_value>Off</default_value>
	</row>
	<row>
		<option>Generate Raw Binary File (.rbf) For Target Device</option>
		<setting>Off</setting>
		<default_value>Off</default_value>
	</row>
	<row>
		<option>Generate Hexadecimal (Intel-Format) Output File (.hexout) for Target Device</option>
		<setting>Off</setting>
		<default_value>Off</default_value>
	</row>
	<row>
		<option>Hexadecimal Output File start address</option>
		<setting>0</setting>
		<default_value>0</default_value>
	</row>
	<row>
		<option>Hexadecimal Output File count direction</option>
		<setting>Up</setting>
		<default_value>Up</default_value>
	</row>
	<row>
		<option>Release clears before tri-states</option>
		<setting>Off</setting>
		<default_value>Off</default_value>
	</row>
	<row>
		<option>Auto-restart configuration after error</option>
		<setting>On</setting>
		<default_value>On</default_value>
	</row>
</assembler_settings>
<general_register_statistics>
	<row>
		<statistic>Total registers</statistic>
		<value>94</value>
	</row>
	<row>
		<statistic>Number of registers using Synchronous Clear</statistic>
		<value>0</value>
	</row>
	<row>
		<statistic>Number of registers using Synchronous Load</statistic>
		<value>0</value>
	</row>
	<row>
		<statistic>Number of registers using Asynchronous Clear</statistic>
		<value>12</value>
	</row>
	<row>
		<statistic>Number of registers using Asynchronous Load</statistic>
		<value>0</value>
	</row>
	<row>
		<statistic>Number of registers using Clock Enable</statistic>
		<value>13</value>
	</row>
	<row>
		<statistic>Number of registers using Preset</statistic>
		<value>0</value>
	</row>
</general_register_statistics>
<clock_settings_summary>
	<row>
		<clock_node_name>clk_4m</clock_node_name>
		<type>User Pin</type>
		<fmax_requirement>None</fmax_requirement>
		<early_latency units="ns">0.000</early_latency>
		<late_latency units="ns">0.000</late_latency>
		<multiply_base_fmax_by>N/A</multiply_base_fmax_by>
		<divide_base_fmax_by>N/A</divide_base_fmax_by>
		<offset>N/A</offset>
	</row>
</clock_settings_summary>
<input_pins>
	<row>
		<name>clk_4m</name>
		<pin__>43</pin__>
		<fan_out>86</fan_out>
		<global>yes</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>judger</name>
		<pin__>44</pin__>
		<fan_out>2</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>clr1</name>
		<pin__>2</pin__>
		<fan_out>3</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>man_left</name>
		<pin__>42</pin__>
		<fan_out>2</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>man_right</name>
		<pin__>1</pin__>
		<fan_out>2</fan_out>
		<global>no</global>
		<i_o_register>no</i_o_register>
		<use_local_routing_input>no</use_local_routing_input>
		<power_up_high>no</power_up_high>
		<single_pin_ce>no</single_pin_ce>
		<i_o_standard>TTL</i_o_standard>
	</row>
</input_pins>
<output_pins>
	<row>
		<name>judger_out</name>
		<pin__>83</pin__>
		<col.>13</col.>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>sel[0]</name>
		<pin__>38</pin__>
		<col.>10</col.>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>sel[1]</name>
		<pin__>22</pin__>
		<row>B</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>seg[0]</name>
		<pin__>21</pin__>
		<row>B</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>seg[1]</name>
		<pin__>25</pin__>
		<row>B</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>seg[2]</name>
		<pin__>8</pin__>
		<col.>3</col.>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>seg[3]</name>
		<pin__>6</pin__>
		<col.>4</col.>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>seg[4]</name>
		<pin__>24</pin__>
		<row>B</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>seg[5]</name>
		<pin__>23</pin__>
		<row>B</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>seg[6]</name>
		<pin__>16</pin__>
		<row>A</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[0]</name>
		<pin__>9</pin__>
		<col.>2</col.>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[1]</name>
		<pin__>64</pin__>
		<row>B</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[2]</name>
		<pin__>27</pin__>
		<row>C</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[3]</name>
		<pin__>61</pin__>
		<row>C</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[4]</name>
		<pin__>10</pin__>
		<col.>1</col.>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[5]</name>
		<pin__>28</pin__>
		<row>C</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[6]</name>
		<pin__>58</pin__>
		<row>C</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[7]</name>
		<pin__>11</pin__>
		<col.>1</col.>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[8]</name>
		<pin__>29</pin__>
		<row>C</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[9]</name>
		<pin__>30</pin__>
		<row>C</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[10]</name>
		<pin__>60</pin__>
		<row>C</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[11]</name>
		<pin__>59</pin__>
		<row>C</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
	<row>
		<name>lamp[12]</name>
		<pin__>62</pin__>
		<row>C</row>
		<i_o_register>no</i_o_register>
		<use_local_routing_output>no</use_local_routing_output>
		<power_up_high>no</power_up_high>
		<slow_slew_rate>no</slow_slew_rate>
		<single_pin_oe>no</single_pin_oe>
		<single_pin_ce>no</single_pin_ce>
		<open_drain>no</open_drain>
		<tri_primitive>no</tri_primitive>
		<i_o_standard>TTL</i_o_standard>
	</row>
</output_pins>
</talkback>