fujieqiall.sim.rpt

用FPGA实现数字复接?肍PGA实现数字复接

; |fujieqiall|neimacs0:m1|tri_gate0:u2|dout0~14                                                                           ; |fujieqiall|neimacs0:m1|tri_gate0:u2|dout0~14                                                                           ; data_out0        ;
; |fujieqiall|neimacs0:m2|mux_8:u1|Y~11                                                                                   ; |fujieqiall|neimacs0:m2|mux_8:u1|Y~11                                                                                   ; data_out0        ;
; |fujieqiall|neimacs0:m2|mux_8:u1|Y~12                                                                                   ; |fujieqiall|neimacs0:m2|mux_8:u1|Y~12                                                                                   ; data_out0        ;
; |fujieqiall|neimacs0:m2|mux_8:u1|Y~13                                                                                   ; |fujieqiall|neimacs0:m2|mux_8:u1|Y~13                                                                                   ; data_out0        ;
; |fujieqiall|neimacs0:m2|mux_8:u1|Y~14                                                                                   ; |fujieqiall|neimacs0:m2|mux_8:u1|Y~14                                                                                   ; data_out0        ;
; |fujieqiall|neimacs0:m2|tri_gate0:u2|dout0~14                                                                           ; |fujieqiall|neimacs0:m2|tri_gate0:u2|dout0~14                                                                           ; data_out0        ;
; |fujieqiall|neimacs0:m4|mux_8:u1|Y~11                                                                                   ; |fujieqiall|neimacs0:m4|mux_8:u1|Y~11                                                                                   ; data_out0        ;
; |fujieqiall|neimacs0:m4|mux_8:u1|Y~12                                                                                   ; |fujieqiall|neimacs0:m4|mux_8:u1|Y~12                                                                                   ; data_out0        ;
; |fujieqiall|neimacs0:m4|mux_8:u1|Y~13                                                                                   ; |fujieqiall|neimacs0:m4|mux_8:u1|Y~13                                                                                   ; data_out0        ;
; |fujieqiall|neimacs0:m4|mux_8:u1|Y~14                                                                                   ; |fujieqiall|neimacs0:m4|mux_8:u1|Y~14                                                                                   ; data_out0        ;
; |fujieqiall|andmen:m11|outp~98                                                                                          ; |fujieqiall|andmen:m11|outp~98                                                                                          ; data_out0        ;
; |fujieqiall|andmen:m11|outp~99                                                                                          ; |fujieqiall|andmen:m11|outp~99                                                                                          ; data_out0        ;
; |fujieqiall|shixusuccessful:m5|count32:u2|lpm_counter:count_5_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT ; |fujieqiall|shixusuccessful:m5|count32:u2|lpm_counter:count_5_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[1]~COUT ; cout             ;
; |fujieqiall|shixusuccessful:m5|count32:u2|lpm_counter:count_5_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT ; |fujieqiall|shixusuccessful:m5|count32:u2|lpm_counter:count_5_rtl_0|alt_counter_f10ke:wysi_counter|counter_cell[0]~COUT ; cout             ;
; |fujieqiall|clk                                                                                                         ; |fujieqiall|clk                                                                                                         ; dataout          ;
; |fujieqiall|S3                                                                                                          ; |fujieqiall|S3                                                                                                          ; padio            ;
; |fujieqiall|S2                                                                                                          ; |fujieqiall|S2                                                                                                          ; padio            ;
; |fujieqiall|S1                                                                                                          ; |fujieqiall|S1                                                                                                          ; padio            ;
; |fujieqiall|S0                                                                                                          ; |fujieqiall|S0                                                                                                          ; padio            ;
; |fujieqiall|fujieout                                                                                                    ; |fujieqiall|fujieout                                                                                                    ; padio            ;
+-------------------------------------------------------------------------------------------------------------------------+-------------------------------------------------------------------------------------------------------------------------+------------------+


The following table displays output ports that do not toggle to 1 during simulation.
+-------------------------------------------------------+
; Missing 1-Value Coverage                              ;
+-----------------+------------------+------------------+
; Node Name       ; Output Port Name ; Output Port Type ;
+-----------------+------------------+------------------+
; |fujieqiall|c0  ; |fujieqiall|c0   ; dataout          ;
; |fujieqiall|c5  ; |fujieqiall|c5   ; dataout          ;
; |fujieqiall|c6  ; |fujieqiall|c6   ; dataout          ;
; |fujieqiall|c7  ; |fujieqiall|c7   ; dataout          ;
; |fujieqiall|a2  ; |fujieqiall|a2   ; dataout          ;
; |fujieqiall|a1  ; |fujieqiall|a1   ; dataout          ;
; |fujieqiall|a3  ; |fujieqiall|a3   ; dataout          ;
; |fujieqiall|a0  ; |fujieqiall|a0   ; dataout          ;
; |fujieqiall|a5  ; |fujieqiall|a5   ; dataout          ;
; |fujieqiall|a6  ; |fujieqiall|a6   ; dataout          ;
; |fujieqiall|a7  ; |fujieqiall|a7   ; dataout          ;
; |fujieqiall|a4  ; |fujieqiall|a4   ; dataout          ;
; |fujieqiall|b2  ; |fujieqiall|b2   ; dataout          ;
; |fujieqiall|b1  ; |fujieqiall|b1   ; dataout          ;
; |fujieqiall|b3  ; |fujieqiall|b3   ; dataout          ;
; |fujieqiall|b0  ; |fujieqiall|b0   ; dataout          ;
; |fujieqiall|b6  ; |fujieqiall|b6   ; dataout          ;
; |fujieqiall|b4  ; |fujieqiall|b4   ; dataout          ;
; |fujieqiall|d3  ; |fujieqiall|d3   ; dataout          ;
; |fujieqiall|d0  ; |fujieqiall|d0   ; dataout          ;
; |fujieqiall|d6  ; |fujieqiall|d6   ; dataout          ;
; |fujieqiall|d7  ; |fujieqiall|d7   ; dataout          ;
; |fujieqiall|d4  ; |fujieqiall|d4   ; dataout          ;
; |fujieqiall|ena ; |fujieqiall|ena  ; dataout          ;
+-----------------+------------------+------------------+


The following table displays output ports that do not toggle to 0 during simulation.
+-------------------------------------------------------+
; Missing 0-Value Coverage                              ;
+-----------------+------------------+------------------+
; Node Name       ; Output Port Name ; Output Port Type ;
+-----------------+------------------+------------------+
; |fujieqiall|c2  ; |fujieqiall|c2   ; dataout          ;
; |fujieqiall|c1  ; |fujieqiall|c1   ; dataout          ;
; |fujieqiall|c3  ; |fujieqiall|c3   ; dataout          ;
; |fujieqiall|c0  ; |fujieqiall|c0   ; dataout          ;
; |fujieqiall|c5  ; |fujieqiall|c5   ; dataout          ;
; |fujieqiall|c6  ; |fujieqiall|c6   ; dataout          ;
; |fujieqiall|c7  ; |fujieqiall|c7   ; dataout          ;
; |fujieqiall|c4  ; |fujieqiall|c4   ; dataout          ;
; |fujieqiall|a2  ; |fujieqiall|a2   ; dataout          ;
; |fujieqiall|a1  ; |fujieqiall|a1   ; dataout          ;
; |fujieqiall|a3  ; |fujieqiall|a3   ; dataout          ;
; |fujieqiall|a0  ; |fujieqiall|a0   ; dataout          ;
; |fujieqiall|a5  ; |fujieqiall|a5   ; dataout          ;
; |fujieqiall|a6  ; |fujieqiall|a6   ; dataout          ;
; |fujieqiall|a7  ; |fujieqiall|a7   ; dataout          ;
; |fujieqiall|a4  ; |fujieqiall|a4   ; dataout          ;
; |fujieqiall|b2  ; |fujieqiall|b2   ; dataout          ;
; |fujieqiall|b1  ; |fujieqiall|b1   ; dataout          ;
; |fujieqiall|b3  ; |fujieqiall|b3   ; dataout          ;
; |fujieqiall|b0  ; |fujieqiall|b0   ; dataout          ;
; |fujieqiall|b5  ; |fujieqiall|b5   ; dataout          ;
; |fujieqiall|b6  ; |fujieqiall|b6   ; dataout          ;
; |fujieqiall|b7  ; |fujieqiall|b7   ; dataout          ;
; |fujieqiall|b4  ; |fujieqiall|b4   ; dataout          ;
; |fujieqiall|d2  ; |fujieqiall|d2   ; dataout          ;
; |fujieqiall|d1  ; |fujieqiall|d1   ; dataout          ;
; |fujieqiall|d3  ; |fujieqiall|d3   ; dataout          ;
; |fujieqiall|d0  ; |fujieqiall|d0   ; dataout          ;
; |fujieqiall|d5  ; |fujieqiall|d5   ; dataout          ;
; |fujieqiall|d6  ; |fujieqiall|d6   ; dataout          ;
; |fujieqiall|d7  ; |fujieqiall|d7   ; dataout          ;
; |fujieqiall|d4  ; |fujieqiall|d4   ; dataout          ;
; |fujieqiall|ena ; |fujieqiall|ena  ; dataout          ;
+-----------------+------------------+------------------+


+---------------------+
; Simulator INI Usage ;
+--------+------------+
; Option ; Usage      ;
+--------+------------+


+--------------------+
; Simulator Messages ;
+--------------------+
Info: *******************************************************************
Info: Running Quartus II Simulator
    Info: Version 5.1 Build 216 03/06/2006 Service Pack 2 SJ Web Edition
    Info: Processing started: Mon May 22 23:20:40 2006
Info: Command: quartus_sim --read_settings_files=on --write_settings_files=off fujieqiall -c fujieqiall
Info: Overwriting simulation input file with simulation results
Info: Option to preserve fewer signal transitions to reduce memory requirements is enabled
    Info: Simulation has been partitioned into sub-simulations according to the maximum transition count determined by the engine. Transitions from memory will be flushed out to disk at the end of each sub-simulation to reduce memory requirements.
Info: Simulation partitioned into 1 sub-simulations
Info: Simulation coverage is      56.00 %
Info: Number of transitions in simulation is 3257
Info: Quartus II Simulator was successful. 0 errors, 0 warnings
    Info: Processing ended: Mon May 22 23:20:41 2006
    Info: Elapsed time: 00:00:02