mul.csf.qmsg

设计一个线性相位FIR滤波器（31阶） 输入8位

{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Analysis & Synthesis " "Info: Running Quartus II Analysis & Synthesis" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 190 1/28/2004 SJ Full Version " "Info: Version 4.0 Build 190 1/28/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Dec 19 22:28:22 2005 " "Info: Processing started: Mon Dec 19 22:28:22 2005" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_map --import_settings_files=on --export_settings_files=off mul -c mul " "Info: Command: quartus_map --import_settings_files=on --export_settings_files=off mul -c mul" {  } {  } 0}
{ "Info" "ISGN_NUM_OF_DESIGN_UNITS_AND_ENTITIES" "mul.vhd 3 1 " "Info: Found 3 design units and 1 entities in source file mul.vhd" { { "Info" "ISGN_DESIGN_UNIT_NAME" "1 nine_bit_int " "Info: Found design unit 1: nine_bit_int" {  } { { "G:/mydesign/fir31/mul/mul.vhd" "nine_bit_int" "" { Text "G:/mydesign/fir31/mul/mul.vhd" 1 -1 0 } }  } 0} { "Info" "ISGN_DESIGN_UNIT_NAME" "2 mul-a " "Info: Found design unit 2: mul-a" {  } { { "G:/mydesign/fir31/mul/mul.vhd" "mul-a" "" { Text "G:/mydesign/fir31/mul/mul.vhd" 16 -1 0 } }  } 0} { "Info" "ISGN_ENTITY_NAME" "1 mul " "Info: Found entity 1: mul" {  } { { "G:/mydesign/fir31/mul/mul.vhd" "mul" "" { Text "G:/mydesign/fir31/mul/mul.vhd" 10 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISMP_SMP_MACHINE_PREPROCESS_STAT" "\|mul\|state 3 0 " "Info: State machine \|mul\|state contains 3 states and 0 state bits" {  } {  } 0}
{ "Info" "ISMP_SMP_MACHINE_REPORT_PROCESSOR" "Auto \|mul\|state " "Info: Selected Auto state machine encoding method for state machine \|mul\|state" {  } {  } 0}
{ "Info" "ISMP_SMP_MACHINE_POSTPROCESS_STAT_HEADER" "\|mul\|state " "Info: Encoding result for state machine \|mul\|state" { { "Info" "ISMP_SMP_MACHINE_POSTPROCESS_STAT_BITS_HEADER" "3 " "Info: Completed encoding using 3 state bits" { { "Info" "ISMP_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state~12 " "Info: Encoded state bit state~12" {  } {  } 0} { "Info" "ISMP_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state~11 " "Info: Encoded state bit state~11" {  } {  } 0} { "Info" "ISMP_SMP_MACHINE_POSTPROCESS_STAT_BITS" "state~10 " "Info: Encoded state bit state~10" {  } {  } 0}  } {  } 0} { "Info" "ISMP_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mul\|state.s0 000 " "Info: State \|mul\|state.s0 uses code string 000" {  } { { "G:/mydesign/fir31/mul/mul.vhd" "" "" { Text "G:/mydesign/fir31/mul/mul.vhd" 18 -1 0 } }  } 0} { "Info" "ISMP_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mul\|state.s1 011 " "Info: State \|mul\|state.s1 uses code string 011" {  } { { "G:/mydesign/fir31/mul/mul.vhd" "" "" { Text "G:/mydesign/fir31/mul/mul.vhd" 18 -1 0 } }  } 0} { "Info" "ISMP_SMP_MACHINE_POSTPROCESS_STAT_CODE" "\|mul\|state.s2 101 " "Info: State \|mul\|state.s2 uses code string 101" {  } { { "G:/mydesign/fir31/mul/mul.vhd" "" "" { Text "G:/mydesign/fir31/mul/mul.vhd" 18 -1 0 } }  } 0}  } {  } 0}
{ "Info" "ISCL_SCL_TM_SUMMARY" "143 " "Info: Implemented 143 device resources after synthesis - the final resource count might be different" { { "Info" "ISCL_SCL_TM_IPINS" "19 " "Info: Implemented 19 input pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_OPINS" "15 " "Info: Implemented 15 output pins" {  } {  } 0} { "Info" "ISCL_SCL_TM_LCELLS" "109 " "Info: Implemented 109 logic cells" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_ERROR_COUNT" "Analysis & Synthesis 0 s 0 s " "Info: Quartus II Analysis & Synthesis was successful. 0 errors, 0 warnings" { { "Info" "IQEXE_END_BANNER_TIME" "Mon Dec 19 22:28:26 2005 " "Info: Processing ended: Mon Dec 19 22:28:26 2005" {  } {  } 0} { "Info" "IQEXE_ELAPSED_TIME" "00:00:03 " "Info: Elapsed time: 00:00:03" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_SEPARATOR" "" "Info: *******************************************************************" {  } {  } 0}
{ "Info" "IQEXE_START_BANNER_PRODUCT" "Fitter " "Info: Running Quartus II Fitter" { { "Info" "IQEXE_START_BANNER_VERSION" "Version 4.0 Build 190 1/28/2004 SJ Full Version " "Info: Version 4.0 Build 190 1/28/2004 SJ Full Version" {  } {  } 0} { "Info" "IQEXE_START_BANNER_TIME" "Mon Dec 19 22:28:27 2005 " "Info: Processing started: Mon Dec 19 22:28:27 2005" {  } {  } 0}  } {  } 0}
{ "Info" "IQEXE_START_BANNER_COMMANDLINE" "quartus_fit --import_settings_files=off --export_settings_files=off mul -c mul " "Info: Command: quartus_fit --import_settings_files=off --export_settings_files=off mul -c mul" {  } {  } 0}