lms.stx

VHDL写的LMS算法程序。利用本地正弦信号

Release 6.2i - xst G.31a
Copyright (c) 1995-2004 Xilinx, Inc.  All rights reserved.
--> Parameter TMPDIR set to .
CPU : 0.00 / 0.98 s | Elapsed : 0.00 / 1.00 s
 
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=========================================================================
*                          HDL Compilation                              *
=========================================================================
WARNING:HDLParsers:3481 - No primary, secondary unit in the file F:\FPGA_LMS4\FPGA_LMS3/costest.vhd. Ignore this file from project file lms_vhdl.prj.
WARNING:HDLParsers:3481 - No primary, secondary unit in the file F:\FPGA_LMS4\FPGA_LMS3/cosfunc.vhd. Ignore this file from project file lms_vhdl.prj.
Compiling vhdl file F:/FPGA_LMS4/FPGA_LMS3/PCK_S2V.vhd in Library work.
Architecture pck_s2v of Entity pck_s2v is up to date.
Compiling vhdl file F:/FPGA_LMS4/FPGA_LMS3/LMS.vhd in Library work.
Entity <lms> (Architecture <behav>) compiled.
CPU : 0.17 / 1.16 s | Elapsed : 0.00 / 1.00 s
 
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Total memory usage is 47872 kilobytes