📄 cpldcontrol.vhd
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LIBRARY IEEE;
USE IEEE.STD_LOGIC_1164.ALL;
USE IEEE.STD_LOGIC_ARITH.ALL;
USE IEEE.STD_LOGIC_UNSIGNED.ALL;
----------------------------------
ENTITY CPLDCONTROL IS
GENERIC(
DIVIDENUM : integer:= 2);
--------------------------
--------------------------
PORT(
--ABOUT USB PORT PINS
RESET : IN STD_LOGIC;
IFCLK : IN STD_LOGIC;
SLOE : IN STD_LOGIC;
FLAGA : IN STD_LOGIC;
FLAGB : IN STD_LOGIC;
FLAGC : IN STD_LOGIC;
FLAGD : IN STD_LOGIC;
CLOCKOUT : IN STD_LOGIC;
---------------------------
-- INPUT PINS ABOUT 422 PORT
TTLIN1 : IN STD_LOGIC;
TTLIN2 : IN STD_LOGIC; --DATA ERROR FLAG='1',MEANS DATA ERROR
TTLIN3 : IN STD_LOGIC;
TTLIN4 : IN STD_LOGIC;
--CHECK_IN1 : INOUT STD_LOGIC;
--CHECK_IN2 : INOUT STD_LOGIC;
--CHECK_IN3 : INOUT STD_LOGIC;
--CHECK_IN4 : INOUT STD_LOGIC;
----------------------------
SELFCHECK_INPUT : IN STD_LOGIC;
---------------------------
--CPLD AND USB DATA BUS AND FIFO SELECT ADDRESS
FD : IN STD_LOGIC_VECTOR(15 DOWNTO 0);
--FIFOADDR : OUT STD_LOGIC_VECTOR(1 DOWNTO 0);
---------------------------
--ABOUT FIFO WRITE AND READ PINS
--SLWR : OUT STD_LOGIC;
--SLRD : OUT STD_LOGIC;
--PKTEND : OUT STD_LOGIC;
--WEAKUP : OUT STD_LOGIC;
--INT0 : OUT STD_LOGIC;
--INT1 : OUT STD_LOGIC;
--SLCS : OUT STD_LOGIC;
---------------------------
-- OUTPUT PINS ABOUT 422
TTLOUT1 : OUT STD_LOGIC;
TTLOUT2 : OUT STD_LOGIC;
--TTLOUT3 : OUT STD_LOGIC;
--TTLOUT4 : OUT STD_LOGIC;
--CHECK_OUT1 : INOUT STD_LOGIC;
--CHECK_OUT2 : INOUT STD_LOGIC;
--CHECK_OUT3 : INOUT STD_LOGIC;
--CHECK_OUT4 : INOUT STD_LOGIC;
---------------------------
--EXTRA SIGNAL ABOUT OTHER
SELFCHECK_LAMP : OUT STD_LOGIC
);
END CPLDCONTROL;
-----------------------------------
-----------------------------------
ARCHITECTURE CPLD_BEHAVE OF CPLDCONTROL IS
---------------------------
SIGNAL INTER_CLOCK_TX : STD_LOGIC;
SIGNAL INTER_CLOCK_RX : STD_LOGIC;
---------------------------
SIGNAL SHRIFT_REG_TX : STD_LOGIC_VECTOR(8 DOWNTO 0);
SIGNAL SIGN_REG_TXOVER : STD_LOGIC_VECTOR(8 DOWNTO 0); --HELP TO JUDGE IF A FRAME HAS BEEN SEND.
SIGNAL STOPBIT_TX : STD_LOGIC;
SIGNAL ODD_CHECK_BIT : STD_LOGIC;
--SIGNAL SHRIFT_OVER : STD_LOGIC; --IF THE SEDN IS OVER SHRIFT_OVER=1
SIGNAL PRITY_FLAG : STD_LOGIC; -- ODD CHECK FLAG
SIGNAL PRITY_BIT : STD_LOGIC; -- ODD CHECK BIT
SIGNAL PRITY_OVER : STD_LOGIC;
SIGNAL WAIT_FLAG : STD_LOGIC; --WAIT STATUS FLAG
--SIGNAL WAIT_COUNTER : STD_LOGIC; --WAIT COUNTER FOR ANSWER IF DATA IS ERROR
SIGNAL DATA_ERROR : STD_LOGIC; --CHECK DATA ERROR FLAG
-----------------------------------
-----------------------------------
BEGIN
-----------------------------------
--GENERATE TX CLOCK
MAKE_TXCLK:
PROCESS (RESET,IFCLK)
VARIABLE COUNT_TX :INTEGER:=0; --GENERATE TX CLOCK (IFCLK DIVIDING BY 4)
BEGIN
IF RESET='1' THEN
INTER_CLOCK_TX<='0';
COUNT_TX:=0;
SELFCHECK_LAMP<='1';
ELSIF (IFCLK'EVENT AND IFCLK='1') THEN
IF(COUNT_TX=2 AND SELFCHECK_INPUT='1') THEN
INTER_CLOCK_TX<=NOT INTER_CLOCK_TX;
SELFCHECK_LAMP<=INTER_CLOCK_TX; --++++++++++++++++++++++++++++++++++++
COUNT_TX:=0;
END IF;
COUNT_TX:=COUNT_TX + 1;
--SELFCHECK_LAMP<='0';
END IF;
END PROCESS;
------------------------------------------------
------------------------------------------------
--SEND TEXTDATA TO 422
TRANSEN_DATA:
PROCESS (RESET,INTER_CLOCK_TX)
--VARIABLE SHRIFT_REG_TX : STD_LOGIC_VECTOR(9 DOWNTO 0);
--VARIABLE SIGN_REG_TXOVER : STD_LOGIC_VECTOR(9 DOWNTO 0); --HELP TO JUDGE IF A FRAME HAS BEEN SEND.
--VARIABLE STOPBIT_TX : STD_LOGIC; --define suspend bit
--VARIABLE ODD_CHECK_BIT : STD_LOGIC; --odd check bit
--VARIABLE COUNT_SHIFT_TX : INTEGER:=0;
--VARIABLE SHRIFT_OVER : STD_LOGIC; --IF THE SEDN IS OVER SHRIFT_OVER=1
VARIABLE SHRIFT_CYCLE_BIT : STD_LOGIC;
VARIABLE WAIT_COUNTER : INTEGER;
BEGIN
IF RESET='1' THEN
TTLOUT1<='1';
SHRIFT_REG_TX<="010101011";
SIGN_REG_TXOVER<="000000000";
STOPBIT_TX<='1';
PRITY_BIT<='1';
ELSIF INTER_CLOCK_TX'EVENT AND INTER_CLOCK_TX='0' THEN
IF PRITY_FLAG='0'AND WAIT_FLAG='0' THEN --==============
PRITY_BIT<=PRITY_BIT XOR SHRIFT_REG_TX(8);
TTLOUT1<=SHRIFT_REG_TX(8);
SHRIFT_CYCLE_BIT:=SHRIFT_REG_TX(8);
SHRIFT_REG_TX<=SHRIFT_REG_TX(7 DOWNTO 0)& SHRIFT_CYCLE_BIT;
SIGN_REG_TXOVER<=SIGN_REG_TXOVER(7 DOWNTO 0)& STOPBIT_TX;
END IF;
--------------------------------- --==============
IF PRITY_FLAG='1' THEN
TTLOUT1<=PRITY_BIT; --++++++++++++++++++++++++++++++++++++
PRITY_OVER<='1';
WAIT_COUNTER:=0;
END IF;
---------------------------------
IF PRITY_OVER='1' THEN
--IF DATA_ERROR<='0' THEN
-------------------------
IF WAIT_COUNTER=1 THEN
PRITY_OVER<='0';
--IF DATA_ERROR='1' THEN
IF TTLIN2='1' THEN
SHRIFT_REG_TX<="010101001";
--DATA_ERROR<='0';
END IF;
--IF DATA_ERROR='0' THEN
-- SHRIFT_REG_TX<="010101010";
--END IF;
END IF;
-------------------------
WAIT_COUNTER:=WAIT_COUNTER+1;
TTLOUT1<='1';
PRITY_BIT<='1';
WAIT_FLAG<='1' ;
-------------------------
SIGN_REG_TXOVER<="000000000";
END IF;
-----------------------------------
IF WAIT_FLAG='1' THEN
WAIT_FLAG<='0';
END IF;
TTLOUT2<=PRITY_FLAG;
END IF;
END PROCESS;
----------------------------------------
PRITY_FLAG<=SIGN_REG_TXOVER(0)AND SIGN_REG_TXOVER(1) AND SIGN_REG_TXOVER(2) AND SIGN_REG_TXOVER(3)
AND SIGN_REG_TXOVER(4) AND SIGN_REG_TXOVER(5) AND SIGN_REG_TXOVER(6)
AND SIGN_REG_TXOVER(7) AND SIGN_REG_TXOVER(8) ;
----------------------------------------
---------------------------------------
---------------------------------------
END CPLD_BEHAVE;
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