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📄 cnt16.rpt

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                                         Logic cells placed in LAB 'B'
        +------------------------------- LC31 |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|gcp2
        | +----------------------------- LC29 |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|gs1
        | | +--------------------------- LC25 |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|gs2
        | | | +------------------------- LC30 |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|ps1
        | | | | +----------------------- LC32 |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|ps2
        | | | | | +--------------------- LC27 |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|result_node0
        | | | | | | +------------------- LC23 |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|result_node1
        | | | | | | | +----------------- LC22 |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|result_node2
        | | | | | | | | +--------------- LC21 |LPM_ADD_SUB:120|addcore:adder|addcore:adder0|gcp2
        | | | | | | | | | +------------- LC17 q10
        | | | | | | | | | | +----------- LC28 q11
        | | | | | | | | | | | +--------- LC26 q12
        | | | | | | | | | | | | +------- LC24 yytt
        | | | | | | | | | | | | | +----- LC20 aaa13
        | | | | | | | | | | | | | | +--- LC19 aaa12
        | | | | | | | | | | | | | | | +- LC18 aaa11
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'B'
LC      | | | | | | | | | | | | | | | | | A B |     Logic cells that feed LAB 'B':
LC29 -> - - - - - - * - - - - - - - - - | - * | <-- |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|gs1
LC25 -> - - - - - - - * - - - - - - - - | - * | <-- |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|gs2
LC30 -> * - - - - - * * - - - - - - - - | - * | <-- |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|ps1
LC32 -> * - - - - - - * - - - - - - - - | - * | <-- |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|ps2
LC27 -> - - - - - - - - - * - - - - - - | - * | <-- |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|result_node0
LC23 -> - - - - - - - - - - - - - - - * | - * | <-- |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|result_node1
LC22 -> - - - - - - - - - - - - - - * - | - * | <-- |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|result_node2
LC17 -> * - - - - * * * * * - - - - - - | - * | <-- q10
LC20 -> * * * * * - * * - - * * - * * * | * * | <-- aaa13
LC19 -> * * * * * - * * * - * * - * * * | * * | <-- aaa12
LC18 -> * * * * * - * * * - * * - * * * | * * | <-- aaa11

Pin
43   -> - - - - - - - - - - - - - - - - | - - | <-- clk1
8    -> - - - - - - - - - * - - - * * * | - * | <-- en
4    -> - - - - - - - - - * - - - * * * | - * | <-- reset1
5    -> * - - - - * * * - - - - - - - - | - * | <-- sum0
6    -> * * - * - - * * - - - - - - - - | - * | <-- sum1
7    -> * - * - * - - - - - - - - - - - | - * | <-- sum2
11   -> - - - - - - - - - * - - * * * * | - * | <-- updownt
LC5  -> - - - - - - - - - - - - - * - - | - * | <-- |LPM_ADD_SUB:63|addcore:adder|addcore:adder0|result_node3
LC4  -> - - - - - - - - - - - - - * - - | - * | <-- |LPM_ADD_SUB:120|addcore:adder|addcore:adder0|result_node3


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                 e:\741\2502144\02502144\cnt16.rpt
cnt16

** EQUATIONS **

clk1     : INPUT;
en       : INPUT;
reset1   : INPUT;
sum0     : INPUT;
sum1     : INPUT;
sum2     : INPUT;
sum3     : INPUT;
updownt  : INPUT;

-- Node name is ':22' = 'aaa11' 
-- Equation name is 'aaa11', location is LC018, type is buried.
aaa11    = DFFE( _EQ001 $  GND, GLOBAL( clk1), !reset1,  VCC,  updownt);
  _EQ001 = !aaa11 &  aaa12 &  aaa13 & !en
         #  aaa11 & !aaa13 & !en
         #  en &  _LC023;

-- Node name is ':21' = 'aaa12' 
-- Equation name is 'aaa12', location is LC019, type is buried.
aaa12    = DFFE( _EQ002 $  GND, GLOBAL( clk1), !reset1,  VCC,  updownt);
  _EQ002 =  aaa11 &  aaa12 &  aaa13 & !en
         #  aaa12 & !aaa13 & !en
         #  en &  _LC022;

-- Node name is ':20' = 'aaa13' 
-- Equation name is 'aaa13', location is LC020, type is buried.
aaa13    = DFFE( _EQ003 $  GND, GLOBAL( clk1), !reset1,  VCC,  updownt);
  _EQ003 = !aaa11 & !aaa12 &  aaa13 & !en
         #  aaa13 & !en &  _LC004
         #  en &  _LC005;

-- Node name is 'coutt' 
-- Equation name is 'coutt', location is LC008, type is output.
 coutt   = LCELL( _EQ004 $  aaa13);
  _EQ004 = !aaa11 & !aaa12 &  aaa13;

-- Node name is 'q10' = 'aaa10' 
-- Equation name is 'q10', location is LC017, type is output.
 q10     = DFFE( _EQ005 $  GND, GLOBAL( clk1), !reset1,  VCC,  updownt);
  _EQ005 =  en &  _LC027
         # !en &  q10;

-- Node name is 'q11' 
-- Equation name is 'q11', location is LC028, type is output.
 q11     = LCELL( _EQ006 $  GND);
  _EQ006 = !aaa11 &  aaa12 &  aaa13
         #  aaa11 & !aaa13;

-- Node name is 'q12' 
-- Equation name is 'q12', location is LC026, type is output.
 q12     = LCELL( _EQ007 $  aaa12);
  _EQ007 = !aaa11 &  aaa12 &  aaa13;

-- Node name is 'q13' 
-- Equation name is 'q13', location is LC009, type is output.
 q13     = LCELL( _EQ008 $  GND);
  _EQ008 = !aaa11 &  aaa12 &  aaa13 & !_LC021
         # !aaa11 & !aaa12 &  aaa13;

-- Node name is 'yytt' 
-- Equation name is 'yytt', location is LC024, type is output.
 yytt    = LCELL( updownt $  GND);

-- Node name is '|LPM_ADD_SUB:63|addcore:adder|addcore:adder0|gcp2' from file "addcore.tdf" line 160, column 8
-- Equation name is '_LC031', type is buried 
_LC031   = LCELL( _EQ009 $  GND);
  _EQ009 = !aaa11 &  aaa12 &  aaa13 & !_LC032 &  sum1
         # !_LC030 & !_LC032 &  q10 &  sum0
         #  aaa11 & !aaa13 & !_LC032 &  sum1
         #  aaa11 &  aaa12 &  sum2
         #  aaa12 & !aaa13 &  sum2;

-- Node name is '|LPM_ADD_SUB:63|addcore:adder|addcore:adder0|gs1' from file "addcore.tdf" line 148, column 7
-- Equation name is '_LC029', type is buried 
_LC029   = LCELL( _EQ010 $  GND);
  _EQ010 = !aaa11 &  aaa12 &  aaa13 &  sum1
         #  aaa11 & !aaa13 &  sum1;

-- Node name is '|LPM_ADD_SUB:63|addcore:adder|addcore:adder0|gs2' from file "addcore.tdf" line 148, column 7
-- Equation name is '_LC025', type is buried 
_LC025   = LCELL( _EQ011 $  GND);
  _EQ011 =  aaa11 &  aaa12 &  aaa13 &  sum2
         #  aaa12 & !aaa13 &  sum2;

-- Node name is '|LPM_ADD_SUB:63|addcore:adder|addcore:adder0|gs3' from file "addcore.tdf" line 148, column 7
-- Equation name is '_LC006', type is buried 
_LC006   = LCELL( _EQ012 $  GND);
  _EQ012 = !aaa11 &  aaa12 &  aaa13 & !_LC021 &  sum3
         # !aaa11 & !aaa12 &  aaa13 &  sum3;

-- Node name is '|LPM_ADD_SUB:63|addcore:adder|addcore:adder0|ps1' from file "addcore.tdf" line 150, column 7
-- Equation name is '_LC030', type is buried 
_LC030   = LCELL( _EQ013 $ !sum1);
  _EQ013 = !aaa11 &  aaa12 &  aaa13 & !sum1
         #  aaa11 & !aaa13 & !sum1;

-- Node name is '|LPM_ADD_SUB:63|addcore:adder|addcore:adder0|ps2' from file "addcore.tdf" line 150, column 7
-- Equation name is '_LC032', type is buried 
_LC032   = LCELL( _EQ014 $  GND);
  _EQ014 = !aaa11 &  aaa12 &  aaa13 & !sum2
         # !aaa12 & !sum2;

-- Node name is '|LPM_ADD_SUB:63|addcore:adder|addcore:adder0|ps3' from file "addcore.tdf" line 150, column 7
-- Equation name is '_LC012', type is buried 
_LC012   = LCELL( _EQ015 $ !sum3);
  _EQ015 = !aaa11 &  aaa13 & !_LC021 & !sum3
         # !aaa11 & !aaa12 &  aaa13 & !sum3;

-- Node name is '|LPM_ADD_SUB:63|addcore:adder|addcore:adder0|result_node0' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC027', type is buried 
_LC027   = LCELL( sum0 $  q10);

-- Node name is '|LPM_ADD_SUB:63|addcore:adder|addcore:adder0|result_node1' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC023', type is buried 
_LC023   = LCELL( _EQ016 $  GND);
  _EQ016 = !aaa11 &  aaa12 &  aaa13 &  q10 &  sum0 &  sum1
         #  aaa11 & !aaa13 &  q10 &  sum0 &  sum1
         #  _LC030 &  q10 &  sum0
         # !_LC029 & !_LC030 & !q10
         # !_LC029 & !_LC030 & !sum0;

-- Node name is '|LPM_ADD_SUB:63|addcore:adder|addcore:adder0|result_node2' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC022', type is buried 
_LC022   = LCELL( _EQ017 $  _EQ018);
  _EQ017 = !aaa11 &  aaa12 &  aaa13 &  sum1
         # !_LC030 &  q10 &  sum0
         #  aaa11 & !aaa13 &  sum1;
  _EQ018 = !_LC025 & !_LC032;

-- Node name is '|LPM_ADD_SUB:63|addcore:adder|addcore:adder0|result_node3' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC005', type is buried 
_LC005   = LCELL( _EQ019 $  _LC031);
  _EQ019 = !_LC006 & !_LC012;

-- Node name is '|LPM_ADD_SUB:120|addcore:adder|addcore:adder0|gcp2' from file "addcore.tdf" line 160, column 8
-- Equation name is '_LC021', type is buried 
_LC021   = LCELL( _EQ020 $  aaa12);
  _EQ020 =  aaa11 & !aaa12 &  q10;

-- Node name is '|LPM_ADD_SUB:120|addcore:adder|addcore:adder0|result_node3' from file "addcore.tdf" line 164, column 16
-- Equation name is '_LC004', type is buried 
_LC004   = LCELL(!aaa13 $  _EQ021);
  _EQ021 = !aaa11 & !_LC021;



--     Shareable expanders that are duplicated in multiple LABs:
--     (none)




Project Information                          e:\741\2502144\02502144\cnt16.rpt

** COMPILATION SETTINGS & TIMES **

Processing Menu Commands
------------------------

Design Doctor                             = off

Logic Synthesis:

   Synthesis Type Used                    = Standard

   Default Synthesis Style                = NORMAL

      Logic option settings in 'NORMAL' style for 'MAX7000' family

      DECOMPOSE_GATES                     = on
      DUPLICATE_LOGIC_EXTRACTION          = on
      MINIMIZATION                        = full
      MULTI_LEVEL_FACTORING               = on
      NOT_GATE_PUSH_BACK                  = on
      PARALLEL_EXPANDERS                  = off
      REDUCE_LOGIC                        = on
      REFACTORIZATION                     = on
      REGISTER_OPTIMIZATION               = on
      RESYNTHESIZE_NETWORK                = on
      SLOW_SLEW_RATE                      = off
      SOFT_BUFFER_INSERTION               = on
      SUBFACTOR_EXTRACTION                = on
      TURBO_BIT                           = on
      XOR_SYNTHESIS                       = on
      IGNORE_SOFT_BUFFERS                 = off
      USE_LPM_FOR_AHDL_OPERATORS          = off

   Other logic synthesis settings:

      Automatic Global Clock              = on
      Automatic Global Clear              = on
      Automatic Global Preset             = on
      Automatic Global Output Enable      = on
      Automatic Fast I/O                  = off
      Automatic Register Packing          = off
      Automatic Open-Drain Pins           = on
      Automatic Implement in EAB          = off
      One-Hot State Machine Encoding      = off
      Optimize                            = 5

Default Timing Specifications: None

Cut All Bidir Feedback Timing Paths       = on
Cut All Clear & Preset Timing Paths       = on

Ignore Timing Assignments                 = off

Functional SNF Extractor                  = off

Linked SNF Extractor                      = off
Timing SNF Extractor                      = on
Optimize Timing SNF                       = off
Generate AHDL TDO File                    = off
Fitter Settings                           = NORMAL
Smart Recompile                           = off
Total Recompile                           = off

Interfaces Menu Commands
------------------------

EDIF Netlist Writer                       = off
Verilog Netlist Writer                    = off
VHDL Netlist Writer                       = off

Compilation Times
-----------------

   Compiler Netlist Extractor             00:00:00
   Database Builder                       00:00:00
   Logic Synthesizer                      00:00:00
   Partitioner                            00:00:00
   Fitter                                 00:00:00
   Timing SNF Extractor                   00:00:00
   Assembler                              00:00:00
   --------------------------             --------
   Total Time                             00:00:00


Memory Allocated
-----------------

Peak memory allocated during compilation  = 4,677K

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