cordic_beh.adf

这是实现cordic算法的一些源程序

[Project]
Current Flow=Multivendor
VCS=0
version=1
Current Config=compile

[Configurations]
compile=cordic_beh

[Library]
cordic_beh=.\cordic_beh.lib

[$LibMap$]
cordic_beh=.
Active_lib=

[Settings]
FLOW_TYPE=HDL
LANGUAGE=VHDL
REFRESH_FLOW=1
SYNTH_TOOL=<none>
IMPL_TOOL=<none>
FAMILY=
HESPrepare=0
FLOWTOOLS=ONLY_IMPL

[IMPLEMENTATION]
UCF=

[Files]
/G:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\cordic_add_rtl.vhd=-1
/G:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\cordic_control_rtl.vhd=-1
/G:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\cordic_dpram_beh.vhd=-1
/G:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\cordic_testbench_struct.vhd=-1
/G:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\cordic_top_struct.vhd=-1
/G:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\genmonitor_beh.vhd=-1
/cordic_controller_rtl1.vhd=-1

[Files.Data]
G:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\cordic_add_rtl.vhd=VHDL Source Code
G:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\cordic_control_rtl.vhd=VHDL Source Code
G:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\cordic_dpram_beh.vhd=VHDL Source Code
G:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\cordic_testbench_struct.vhd=VHDL Source Code
G:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\cordic_top_struct.vhd=VHDL Source Code
G:\2006春季课程\通信系统仿真与SOC集成-周祖成-2005春\1_A_作业\HDesign\HDesign_lib\hdl\genmonitor_beh.vhd=VHDL Source Code
.\src\cordic_controller_rtl1.vhd=VHDL Source Code

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