readme_sum_of_products_verilog.txt

来自「本人正在学习vhdl语言」· 文本 代码 · 共 50 行

TXT
50 行
字号
README file: Virtex-II Platform FPGA Handbook
=============================================

Date: March, 2001

Verilog code examples are provided to illustrate the Chapter 2 - Design Considerations - of 
the Virtex-II Platform FPFA Handbook.

- Verilog Templates:
Verilog templates are available as examples to instantiate primitives. 

- Verilog Submodules:
Verilog submodules are low level Verilog code instantiating some primitives. 
These submodules can be instantiated in a design and must be synthesized with the design.

The templates and submodules can be found in the following directories corresponding to 
each section of the Chapter 2: Design Considerations (Virtex-II Platform FPGA HandBook)

Directory:
------------

- sum_of_products: "Designing Sum of Products"

Submodules (code example):
 SOP_SUBM.v
 AND_LOGIC.v
 and_chain.v
 

Who to Contact if you have questions?

http://support.xilinx.com/

North American Support
Hotline: 1-800-255-7778 
or (408) 879-5199 
Fax: (408) 879-4442 
Email: hotline@xilinx.com 
 
United Kingdom Support
Hotline: +44 870 7350 610
Fax: +44 870 7350 620 
Email : ukhelp@xilinx.com 
 
Japan Support
Hotline: Local Distributor
Fax: Local Distributor
Email: jhotline@xilinx.com
 

⌨️ 快捷键说明

复制代码Ctrl + C
搜索代码Ctrl + F
全屏模式F11
增大字号Ctrl + =
减小字号Ctrl + -
显示快捷键?