cpu_mm_manager3.map.eqn

利用VHDL语言描述的一个简单微处理器,可以通过修改源码来调整指令集,可以在Quartus II上直接运行和编译.

MM_RE_6[3]_lut_out = !A1L235;
MM_RE_6[3] = DFFEA(MM_RE_6[3]_lut_out, clk, reset, , A1L902, , );


--MM_RE_4[3] is MM_RE_4[3]
--operation mode is normal

MM_RE_4[3]_lut_out = A1L235;
MM_RE_4[3] = DFFEA(MM_RE_4[3]_lut_out, clk, reset, , A1L981, , );


--A1L163 is Mux~1219
--operation mode is normal

A1L163 = AddrR_out[2] & (AddrR_out[3] # !MM_RE_6[3]) # !AddrR_out[2] & !AddrR_out[3] & MM_RE_4[3];


--MM_RE_7[3] is MM_RE_7[3]
--operation mode is normal

MM_RE_7[3]_lut_out = !A1L235;
MM_RE_7[3] = DFFEA(MM_RE_7[3]_lut_out, clk, reset, , A1L912, , );


--A1L263 is Mux~1220
--operation mode is normal

A1L263 = A1L163 & (!MM_RE_7[3] # !AddrR_out[3]) # !A1L163 & MM_RE_5[3] & AddrR_out[3];


--MM_RE_A[3] is MM_RE_A[3]
--operation mode is normal

MM_RE_A[3]_lut_out = A1L235;
MM_RE_A[3] = DFFEA(MM_RE_A[3]_lut_out, clk, reset, , A1L942, , );


--MM_RE_9[3] is MM_RE_9[3]
--operation mode is normal

MM_RE_9[3]_lut_out = A1L235;
MM_RE_9[3] = DFFEA(MM_RE_9[3]_lut_out, clk, reset, , A1L932, , );


--MM_RE_8[3] is MM_RE_8[3]
--operation mode is normal

MM_RE_8[3]_lut_out = !A1L235;
MM_RE_8[3] = DFFEA(MM_RE_8[3]_lut_out, clk, reset, , A1L922, , );


--A1L363 is Mux~1221
--operation mode is normal

A1L363 = AddrR_out[3] & (AddrR_out[2] # MM_RE_9[3]) # !AddrR_out[3] & !AddrR_out[2] & !MM_RE_8[3];


--MM_RE_B[3] is MM_RE_B[3]
--operation mode is normal

MM_RE_B[3]_lut_out = A1L235;
MM_RE_B[3] = DFFEA(MM_RE_B[3]_lut_out, clk, reset, , A1L952, , );


--A1L463 is Mux~1222
--operation mode is normal

A1L463 = A1L363 & (MM_RE_B[3] # !AddrR_out[2]) # !A1L363 & MM_RE_A[3] & AddrR_out[2];


--MM_RE_2[3] is MM_RE_2[3]
--operation mode is normal

MM_RE_2[3]_lut_out = !A1L235;
MM_RE_2[3] = DFFEA(MM_RE_2[3]_lut_out, clk, reset, , A1L961, , );


--MM_RE_1[3] is MM_RE_1[3]
--operation mode is normal

MM_RE_1[3]_lut_out = !A1L235;
MM_RE_1[3] = DFFEA(MM_RE_1[3]_lut_out, clk, reset, , A1L951, , );


--MM_RE_0[3] is MM_RE_0[3]
--operation mode is normal

MM_RE_0[3]_lut_out = A1L235;
MM_RE_0[3] = DFFEA(MM_RE_0[3]_lut_out, clk, reset, , A1L941, , );


--A1L953 is Mux~1217
--operation mode is normal

A1L953 = AddrR_out[3] & (AddrR_out[2] # !MM_RE_1[3]) # !AddrR_out[3] & !AddrR_out[2] & MM_RE_0[3];


--MM_RE_3[3] is MM_RE_3[3]
--operation mode is normal

MM_RE_3[3]_lut_out = A1L235;
MM_RE_3[3] = DFFEA(MM_RE_3[3]_lut_out, clk, reset, , A1L971, , );


--A1L063 is Mux~1218
--operation mode is normal

A1L063 = A1L953 & (MM_RE_3[3] # !AddrR_out[2]) # !A1L953 & !MM_RE_2[3] & AddrR_out[2];


--A1L853 is Mux~1215
--operation mode is normal

A1L853 = AddrR_out[0] & (AddrR_out[1] # A1L463) # !AddrR_out[0] & !AddrR_out[1] & A1L063;


--MM_RE_D[3] is MM_RE_D[3]
--operation mode is normal

MM_RE_D[3]_lut_out = A1L235;
MM_RE_D[3] = DFFEA(MM_RE_D[3]_lut_out, clk, reset, , A1L972, , );


--MM_RE_E[3] is MM_RE_E[3]
--operation mode is normal

MM_RE_E[3]_lut_out = A1L235;
MM_RE_E[3] = DFFEA(MM_RE_E[3]_lut_out, clk, reset, , A1L982, , );


--MM_RE_C[3] is MM_RE_C[3]
--operation mode is normal

MM_RE_C[3]_lut_out = A1L235;
MM_RE_C[3] = DFFEA(MM_RE_C[3]_lut_out, clk, reset, , A1L962, , );


--A1L563 is Mux~1223
--operation mode is normal

A1L563 = AddrR_out[2] & (AddrR_out[3] # MM_RE_E[3]) # !AddrR_out[2] & !AddrR_out[3] & MM_RE_C[3];


--MM_RE_F[3] is MM_RE_F[3]
--operation mode is normal

MM_RE_F[3]_lut_out = A1L235;
MM_RE_F[3] = DFFEA(MM_RE_F[3]_lut_out, clk, reset, , A1L992, , );


--A1L663 is Mux~1224
--operation mode is normal

A1L663 = A1L563 & (MM_RE_F[3] # !AddrR_out[3]) # !A1L563 & MM_RE_D[3] & AddrR_out[3];


--R_out[3] is R_out[3]
--operation mode is normal

R_out[3]_lut_out = A1L623 & (R_to_ALU[1] # R_out[3]) # !A1L623 & R1[3] & !R_to_ALU[1];
R_out[3] = DFFEA(R_out[3]_lut_out, clk, VCC, , reset, , );


--A1L88 is DataOut[3]~219
--operation mode is normal

A1L88 = LCELL(R_out[3] & (A1L88 # DataOut_to_bus) # !R_out[3] & A1L88 & !DataOut_to_bus);


--MM_RE_A[4] is MM_RE_A[4]
--operation mode is normal

MM_RE_A[4]_lut_out = A1L435;
MM_RE_A[4] = DFFEA(MM_RE_A[4]_lut_out, clk, reset, , A1L942, , );


--MM_RE_9[4] is MM_RE_9[4]
--operation mode is normal

MM_RE_9[4]_lut_out = A1L435;
MM_RE_9[4] = DFFEA(MM_RE_9[4]_lut_out, clk, reset, , A1L932, , );


--MM_RE_8[4] is MM_RE_8[4]
--operation mode is normal

MM_RE_8[4]_lut_out = A1L435;
MM_RE_8[4] = DFFEA(MM_RE_8[4]_lut_out, clk, reset, , A1L922, , );


--A1L273 is Mux~1231
--operation mode is normal

A1L273 = AddrR_out[3] & (AddrR_out[2] # MM_RE_9[4]) # !AddrR_out[3] & !AddrR_out[2] & MM_RE_8[4];


--MM_RE_B[4] is MM_RE_B[4]
--operation mode is normal

MM_RE_B[4]_lut_out = A1L435;
MM_RE_B[4] = DFFEA(MM_RE_B[4]_lut_out, clk, reset, , A1L952, , );


--A1L373 is Mux~1232
--operation mode is normal

A1L373 = A1L273 & (MM_RE_B[4] # !AddrR_out[2]) # !A1L273 & MM_RE_A[4] & AddrR_out[2];


--MM_RE_5[4] is MM_RE_5[4]
--operation mode is normal

MM_RE_5[4]_lut_out = A1L435;
MM_RE_5[4] = DFFEA(MM_RE_5[4]_lut_out, clk, reset, , A1L991, , );


--MM_RE_6[4] is MM_RE_6[4]
--operation mode is normal

MM_RE_6[4]_lut_out = A1L435;
MM_RE_6[4] = DFFEA(MM_RE_6[4]_lut_out, clk, reset, , A1L902, , );


--MM_RE_4[4] is MM_RE_4[4]
--operation mode is normal

MM_RE_4[4]_lut_out = A1L435;
MM_RE_4[4] = DFFEA(MM_RE_4[4]_lut_out, clk, reset, , A1L981, , );


--A1L073 is Mux~1229
--operation mode is normal

A1L073 = AddrR_out[2] & (AddrR_out[3] # MM_RE_6[4]) # !AddrR_out[2] & !AddrR_out[3] & MM_RE_4[4];


--MM_RE_7[4] is MM_RE_7[4]
--operation mode is normal

MM_RE_7[4]_lut_out = A1L435;
MM_RE_7[4] = DFFEA(MM_RE_7[4]_lut_out, clk, reset, , A1L912, , );


--A1L173 is Mux~1230
--operation mode is normal

A1L173 = A1L073 & (MM_RE_7[4] # !AddrR_out[3]) # !A1L073 & MM_RE_5[4] & AddrR_out[3];


--MM_RE_2[4] is MM_RE_2[4]
--operation mode is normal

MM_RE_2[4]_lut_out = A1L435;
MM_RE_2[4] = DFFEA(MM_RE_2[4]_lut_out, clk, reset, , A1L961, , );


--MM_RE_1[4] is MM_RE_1[4]
--operation mode is normal

MM_RE_1[4]_lut_out = !A1L435;
MM_RE_1[4] = DFFEA(MM_RE_1[4]_lut_out, clk, reset, , A1L951, , );


--MM_RE_0[4] is MM_RE_0[4]
--operation mode is normal

MM_RE_0[4]_lut_out = !A1L435;
MM_RE_0[4] = DFFEA(MM_RE_0[4]_lut_out, clk, reset, , A1L941, , );


--A1L863 is Mux~1227
--operation mode is normal

A1L863 = AddrR_out[3] & (AddrR_out[2] # !MM_RE_1[4]) # !AddrR_out[3] & !AddrR_out[2] & !MM_RE_0[4];


--MM_RE_3[4] is MM_RE_3[4]
--operation mode is normal

MM_RE_3[4]_lut_out = A1L435;
MM_RE_3[4] = DFFEA(MM_RE_3[4]_lut_out, clk, reset, , A1L971, , );


--A1L963 is Mux~1228
--operation mode is normal

A1L963 = A1L863 & (MM_RE_3[4] # !AddrR_out[2]) # !A1L863 & MM_RE_2[4] & AddrR_out[2];


--A1L763 is Mux~1225
--operation mode is normal

A1L763 = AddrR_out[1] & (AddrR_out[0] # A1L173) # !AddrR_out[1] & !AddrR_out[0] & A1L963;


--MM_RE_D[4] is MM_RE_D[4]
--operation mode is normal

MM_RE_D[4]_lut_out = A1L435;
MM_RE_D[4] = DFFEA(MM_RE_D[4]_lut_out, clk, reset, , A1L972, , );


--MM_RE_E[4] is MM_RE_E[4]
--operation mode is normal

MM_RE_E[4]_lut_out = A1L435;
MM_RE_E[4] = DFFEA(MM_RE_E[4]_lut_out, clk, reset, , A1L982, , );


--MM_RE_C[4] is MM_RE_C[4]
--operation mode is normal

MM_RE_C[4]_lut_out = A1L435;
MM_RE_C[4] = DFFEA(MM_RE_C[4]_lut_out, clk, reset, , A1L962, , );


--A1L473 is Mux~1233
--operation mode is normal

A1L473 = AddrR_out[2] & (AddrR_out[3] # MM_RE_E[4]) # !AddrR_out[2] & !AddrR_out[3] & MM_RE_C[4];


--MM_RE_F[4] is MM_RE_F[4]
--operation mode is normal

MM_RE_F[4]_lut_out = A1L435;
MM_RE_F[4] = DFFEA(MM_RE_F[4]_lut_out, clk, reset, , A1L992, , );


--A1L573 is Mux~1234
--operation mode is normal

A1L573 = A1L473 & (MM_RE_F[4] # !AddrR_out[3]) # !A1L473 & MM_RE_D[4] & AddrR_out[3];


--R_out[4] is R_out[4]
--operation mode is normal

R_out[4]_lut_out = A1L723 & (R_to_ALU[0] # R_out[4]) # !A1L723 & R2[4] & !R_to_ALU[0];
R_out[4] = DFFEA(R_out[4]_lut_out, clk, VCC, , reset, , );


--A1L09 is DataOut[4]~220
--operation mode is normal

A1L09 = LCELL(R_out[4] & (A1L09 # DataOut_to_bus) # !R_out[4] & A1L09 & !DataOut_to_bus);


--MM_RE_5[5] is MM_RE_5[5]
--operation mode is normal

MM_RE_5[5]_lut_out = A1L635;
MM_RE_5[5] = DFFEA(MM_RE_5[5]_lut_out, clk, reset, , A1L991, , );


--MM_RE_6[5] is MM_RE_6[5]
--operation mode is normal

MM_RE_6[5]_lut_out = A1L635;
MM_RE_6[5] = DFFEA(MM_RE_6[5]_lut_out, clk, reset, , A1L902, , );


--MM_RE_4[5] is MM_RE_4[5]
--operation mode is normal

MM_RE_4[5]_lut_out = A1L635;
MM_RE_4[5] = DFFEA(MM_RE_4[5]_lut_out, clk, reset, , A1L981, , );


--A1L973 is Mux~1239
--operation mode is normal

A1L973 = AddrR_out[2] & (AddrR_out[3] # MM_RE_6[5]) # !AddrR_out[2] & !AddrR_out[3] & MM_RE_4[5];


--MM_RE_7[5] is MM_RE_7[5]
--operation mode is normal

MM_RE_7[5]_lut_out = A1L635;
MM_RE_7[5] = DFFEA(MM_RE_7[5]_lut_out, clk, reset, , A1L912, , );


--A1L083 is Mux~1240
--operation mode is normal

A1L083 = A1L973 & (MM_RE_7[5] # !AddrR_out[3]) # !A1L973 & MM_RE_5[5] & AddrR_out[3];


--MM_RE_A[5] is MM_RE_A[5]
--operation mode is normal

MM_RE_A[5]_lut_out = A1L635;
MM_RE_A[5] = DFFEA(MM_RE_A[5]_lut_out, clk, reset, , A1L942, , );


--MM_RE_9[5] is MM_RE_9[5]
--operation mode is normal

MM_RE_9[5]_lut_out = A1L635;
MM_RE_9[5] = DFFEA(MM_RE_9[5]_lut_out, clk, reset, , A1L932, , );


--MM_RE_8[5] is MM_RE_8[5]
--operation mode is normal

MM_RE_8[5]_lut_out = !A1L635;
MM_RE_8[5] = DFFEA(MM_RE_8[5]_lut_out, clk, reset, , A1L922, , );


--A1L183 is Mux~1241
--operation mode is normal

A1L183 = AddrR_out[3] & (AddrR_out[2] # MM_RE_9[5]) # !AddrR_out[3] & !AddrR_out[2] & !MM_RE_8[5];


--MM_RE_B[5] is MM_RE_B[5]
--operation mode is normal

MM_RE_B[5]_lut_out = A1L635;
MM_RE_B[5] = DFFEA(MM_RE_B[5]_lut_out, clk, reset, , A1L952, , );


--A1L283 is Mux~1242
--operation mode is normal

A1L283 = A1L183 & (MM_RE_B[5] # !AddrR_out[2]) # !A1L183 & MM_RE_A[5] & AddrR_out[2];


--MM_RE_2[5] is MM_RE_2[5]
--operation mode is normal

MM_RE_2[5]_lut_out = !A1L635;
MM_RE_2[5] = DFFEA(MM_RE_2[5]_lut_out, clk, reset, , A1L961, , );


--MM_RE_1[5] is MM_RE_1[5]
--operation mode is normal

MM_RE_1[5]_lut_out = !A1L635;
MM_RE_1[5] = DFFEA(MM_RE_1[5]_lut_out, clk, reset, , A1L951, , );


--MM_RE_0[5] is MM_RE_0[5]
--operation mode is normal

MM_RE_0[5]_lut_out = !A1L635;
MM_RE_0[5] = DFFEA(MM_RE_0[5]_lut_out, clk, reset, , A1L941, , );


--A1L773 is Mux~1237
--operation mode is normal

A1L773 = AddrR_out[3] & (AddrR_out[2] # !MM_RE_1[5]) # !AddrR_out[3] & !AddrR_out[2] & !MM_RE_0[5];


--MM_RE_3[5] is MM_RE_3[5]
--operation mode is normal

MM_RE_3[5]_lut_out = A1L635;
MM_RE_3[5] = DFFEA(MM_RE_3[5]_lut_out, clk, reset, , A1L971, , );


--A1L873 is Mux~1238
--operation mode is normal

A1L873 = A1L773 & (MM_RE_3[5] # !AddrR_out[2]) # !A1L773 & !MM_RE_2[5] & AddrR_out[2];


--A1L673 is Mux~1235
--operation mode is normal

A1L673 = AddrR_out[0] & (AddrR_out[1] # A1L283) # !AddrR_out[0] & !AddrR_out[1] & A1L873;


--MM_RE_D[5] is MM_RE_D[5]
--operation mode is normal

MM_RE_D[5]_lut_out = A1L635;
MM_RE_D[5] = DFFEA(MM_RE_D[5]_lut_out, clk, reset, , A1L972, , );


--MM_RE_E[5] is MM_RE_E[5]
--operation mode is normal

MM_RE_E[5]_lut_out = A1L635;
MM_RE_E[5] = DFFEA(MM_RE_E[5]_lut_out, clk, reset, , A1L982, , );


--MM_RE_C[5] is MM_RE_C[5]
--operation mode is normal

MM_RE_C[5]_lut_out = A1L635;
MM_RE_C[5] = DFFEA(MM_RE_C[5]_lut_out, clk, reset, , A1L962, , );


--A1L383 is Mux~1243
--operation mode is normal

A1L383 = AddrR_out[2] & (AddrR_out[3] # MM_RE_E[5]) # !AddrR_out[2] & !AddrR_out[3] & MM_RE_C[5];


--MM_RE_F[5] is MM_RE_F[5]
--operation mode is normal

MM_RE_F[5]_lut_out = A1L635;
MM_RE_F[5] = DFFEA(MM_RE_F[5]_lut_out, clk, reset, , A1L992, , );


--A1L483 is Mux~1244
--operation mode is normal

A1L483 = A1L383 & (MM_RE_F[5] # !AddrR_out[3]) # !A1L383 & MM_RE_D[5] & AddrR_out[3];


--R_out[5] is R_out[5]
--operation mode is normal

R_out[5]_lut_out = A1L823 & (R_to_ALU[1] # R_out[5]) # !A1L823 & R1[5] & !R_to_ALU[1];
R_out[5] = DFFEA(R_out[5]_lut_out, clk, VCC, , reset, , );


--A1L29 is DataOut[5]~221
--operation mode is normal

A1L29 = LCELL(R_out[5] & (A1L29 # DataOut_to_bus) # !R_out[5] & A1L29 & !DataOut_to_bus);


--MM_RE_A[6] is MM_RE_A[6]
--operation mode is normal

MM_RE_A[6]_lut_out = A1L835;
MM_RE_A[6] = DFFEA(MM_RE_A[6]_lut_out, clk, reset, , A1L942, , );


--MM_RE_9[6] is MM_RE_9[6]
--operation mode is normal

MM_RE_9[6]_lut_out = A1L835;
MM_RE_9[6] = DFFEA(MM_RE_9[6]_lut_out, clk, reset, , A1L932, , );


--MM_RE_8[6] is MM_RE_8[6]
--operation mode is normal

MM_RE_8[6]_lut_out = A1L835;
MM_RE_8[6] = DFFEA(MM_RE_8[6]_lut_out, clk, reset, , A1L922, , );


--A1L093 is Mux~1251
--operation mode is normal

A1L093 = AddrR_out[3] & (AddrR_out[2] # MM_RE_9[6]) # !AddrR_out[3] & !AddrR_out[2] & MM_RE_8[6];


--MM_RE_B[6] is MM_RE_B[6]
--operation mode is normal

MM_RE_B[6]_lut_out = A1L835;
MM_RE_B[6] = DFFEA(MM_RE_B[6]_lut_out, clk, reset, , A1L952, , );


--A1L193 is Mux~1252
--operation mode is normal

A1L193 = A1L093 & (MM_RE_B[6] # !AddrR_out[2]) # !A1L093 & MM_RE_A[6] & AddrR_out[2];


--MM_RE_5[6] is MM_RE_5[6]
--operation mode is normal

MM_RE_5[6]_lut_out = A1L835;
MM_RE_5[6] = DFFEA(MM_RE_5[6]_lut_out, clk, reset, , A1L991, , );


--MM_RE_6[6] is MM_RE_6[6]
--operation mode is normal

MM_RE_6[6]_lut_out = A1L835;
MM_RE_6[6] = DFFEA(MM_RE_6[6]_lut_out, clk, reset, , A1L902, , );


--MM_RE_4[6] is MM_RE_4[6]
--operation mode is normal