cpu_mm_manager3.fit.eqn

利用VHDL语言描述的一个简单微处理器,可以通过修改源码来调整指令集,可以在Quartus II上直接运行和编译.

R_out[4] = DFFEA(R_out[4]_lut_out, GLOBAL(clk), VCC, , reset, , );


--A1L811 is DataOut[4]~220 at LC_X34_Y21_N3
--operation mode is normal

A1L811 = LCELL(DataOut_to_bus & R_out[4] # !DataOut_to_bus & A1L811);


--A1L704 is Mux~1239 at LC_X34_Y27_N0
--operation mode is normal

MM_RE_6[5]_qfbk = MM_RE_6[5];
A1L704 = AddrR_out[2] & (AddrR_out[3] # MM_RE_6[5]_qfbk) # !AddrR_out[2] & !AddrR_out[3] & MM_RE_4[5];

--MM_RE_6[5] is MM_RE_6[5] at LC_X34_Y27_N0
--operation mode is normal

MM_RE_6[5]_sload_eqn = A1L465;
MM_RE_6[5] = DFFEA(MM_RE_6[5]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L732, , );


--MM_RE_7[5] is MM_RE_7[5] at LC_X36_Y26_N3
--operation mode is normal

MM_RE_7[5]_sload_eqn = A1L465;
MM_RE_7[5] = DFFEA(MM_RE_7[5]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L742, , );


--A1L804 is Mux~1240 at LC_X34_Y27_N1
--operation mode is normal

MM_RE_5[5]_qfbk = MM_RE_5[5];
A1L804 = A1L704 & (MM_RE_7[5] # !AddrR_out[3]) # !A1L704 & AddrR_out[3] & MM_RE_5[5]_qfbk;

--MM_RE_5[5] is MM_RE_5[5] at LC_X34_Y27_N1
--operation mode is normal

MM_RE_5[5]_sload_eqn = A1L465;
MM_RE_5[5] = DFFEA(MM_RE_5[5]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L722, , );


--MM_RE_8[5] is MM_RE_8[5] at LC_X32_Y26_N8
--operation mode is normal

MM_RE_8[5]_lut_out = !A1L465;
MM_RE_8[5] = DFFEA(MM_RE_8[5]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L752, , );


--A1L904 is Mux~1241 at LC_X34_Y24_N6
--operation mode is normal

MM_RE_9[5]_qfbk = MM_RE_9[5];
A1L904 = AddrR_out[3] & (AddrR_out[2] # MM_RE_9[5]_qfbk) # !AddrR_out[3] & !AddrR_out[2] & !MM_RE_8[5];

--MM_RE_9[5] is MM_RE_9[5] at LC_X34_Y24_N6
--operation mode is normal

MM_RE_9[5]_sload_eqn = A1L465;
MM_RE_9[5] = DFFEA(MM_RE_9[5]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L762, , );


--MM_RE_B[5] is MM_RE_B[5] at LC_X32_Y24_N9
--operation mode is normal

MM_RE_B[5]_sload_eqn = A1L465;
MM_RE_B[5] = DFFEA(MM_RE_B[5]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L782, , );


--A1L014 is Mux~1242 at LC_X32_Y24_N1
--operation mode is normal

MM_RE_A[5]_qfbk = MM_RE_A[5];
A1L014 = A1L904 & (MM_RE_B[5] # !AddrR_out[2]) # !A1L904 & AddrR_out[2] & MM_RE_A[5]_qfbk;

--MM_RE_A[5] is MM_RE_A[5] at LC_X32_Y24_N1
--operation mode is normal

MM_RE_A[5]_sload_eqn = A1L465;
MM_RE_A[5] = DFFEA(MM_RE_A[5]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L772, , );


--MM_RE_2[5] is MM_RE_2[5] at LC_X31_Y26_N2
--operation mode is normal

MM_RE_2[5]_lut_out = !A1L465;
MM_RE_2[5] = DFFEA(MM_RE_2[5]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L791, , );


--MM_RE_1[5] is MM_RE_1[5] at LC_X31_Y25_N3
--operation mode is normal

MM_RE_1[5]_lut_out = !A1L465;
MM_RE_1[5] = DFFEA(MM_RE_1[5]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L781, , );


--MM_RE_0[5] is MM_RE_0[5] at LC_X32_Y26_N1
--operation mode is normal

MM_RE_0[5]_lut_out = !A1L465;
MM_RE_0[5] = DFFEA(MM_RE_0[5]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L771, , );


--A1L504 is Mux~1237 at LC_X33_Y25_N9
--operation mode is normal

A1L504 = AddrR_out[3] & (AddrR_out[2] # !MM_RE_1[5]) # !AddrR_out[3] & !AddrR_out[2] & !MM_RE_0[5];


--A1L604 is Mux~1238 at LC_X33_Y25_N4
--operation mode is normal

MM_RE_3[5]_qfbk = MM_RE_3[5];
A1L604 = A1L504 & (MM_RE_3[5]_qfbk # !AddrR_out[2]) # !A1L504 & !MM_RE_2[5] & AddrR_out[2];

--MM_RE_3[5] is MM_RE_3[5] at LC_X33_Y25_N4
--operation mode is normal

MM_RE_3[5]_sload_eqn = A1L465;
MM_RE_3[5] = DFFEA(MM_RE_3[5]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L702, , );


--A1L404 is Mux~1235 at LC_X33_Y25_N7
--operation mode is normal

A1L404 = AddrR_out[0] & (AddrR_out[1] # A1L014) # !AddrR_out[0] & A1L604 & !AddrR_out[1];


--MM_RE_C[5] is MM_RE_C[5] at LC_X32_Y23_N2
--operation mode is normal

MM_RE_C[5]_lut_out = A1L465;
MM_RE_C[5] = DFFEA(MM_RE_C[5]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L792, , );


--A1L114 is Mux~1243 at LC_X32_Y27_N1
--operation mode is normal

MM_RE_E[5]_qfbk = MM_RE_E[5];
A1L114 = AddrR_out[2] & (AddrR_out[3] # MM_RE_E[5]_qfbk) # !AddrR_out[2] & !AddrR_out[3] & MM_RE_C[5];

--MM_RE_E[5] is MM_RE_E[5] at LC_X32_Y27_N1
--operation mode is normal

MM_RE_E[5]_sload_eqn = A1L465;
MM_RE_E[5] = DFFEA(MM_RE_E[5]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L713, , );


--MM_RE_F[5] is MM_RE_F[5] at LC_X33_Y27_N4
--operation mode is normal

MM_RE_F[5]_sload_eqn = A1L465;
MM_RE_F[5] = DFFEA(MM_RE_F[5]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L723, , );


--A1L214 is Mux~1244 at LC_X33_Y27_N8
--operation mode is normal

MM_RE_D[5]_qfbk = MM_RE_D[5];
A1L214 = A1L114 & (MM_RE_F[5] # !AddrR_out[3]) # !A1L114 & AddrR_out[3] & MM_RE_D[5]_qfbk;

--MM_RE_D[5] is MM_RE_D[5] at LC_X33_Y27_N8
--operation mode is normal

MM_RE_D[5]_sload_eqn = A1L465;
MM_RE_D[5] = DFFEA(MM_RE_D[5]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L703, , );


--R_out[5] is R_out[5] at LC_X36_Y21_N7
--operation mode is normal

R_out[5]_lut_out = A1L653 & (R_out[5] # R_to_ALU[1]) # !A1L653 & R1[5] & !R_to_ALU[1];
R_out[5] = DFFEA(R_out[5]_lut_out, GLOBAL(clk), VCC, , reset, , );


--A1L021 is DataOut[5]~221 at LC_X36_Y21_N3
--operation mode is normal

A1L021 = LCELL(A1L021 & (R_out[5] # !DataOut_to_bus) # !A1L021 & R_out[5] & DataOut_to_bus);


--A1L814 is Mux~1251 at LC_X34_Y24_N7
--operation mode is normal

MM_RE_9[6]_qfbk = MM_RE_9[6];
A1L814 = AddrR_out[3] & (AddrR_out[2] # MM_RE_9[6]_qfbk) # !AddrR_out[3] & MM_RE_8[6] & !AddrR_out[2];

--MM_RE_9[6] is MM_RE_9[6] at LC_X34_Y24_N7
--operation mode is normal

MM_RE_9[6]_sload_eqn = A1L665;
MM_RE_9[6] = DFFEA(MM_RE_9[6]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L762, , );


--MM_RE_B[6] is MM_RE_B[6] at LC_X32_Y24_N2
--operation mode is normal

MM_RE_B[6]_lut_out = A1L665;
MM_RE_B[6] = DFFEA(MM_RE_B[6]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L782, , );


--A1L914 is Mux~1252 at LC_X32_Y24_N8
--operation mode is normal

MM_RE_A[6]_qfbk = MM_RE_A[6];
A1L914 = A1L814 & (MM_RE_B[6] # !AddrR_out[2]) # !A1L814 & AddrR_out[2] & MM_RE_A[6]_qfbk;

--MM_RE_A[6] is MM_RE_A[6] at LC_X32_Y24_N8
--operation mode is normal

MM_RE_A[6]_sload_eqn = A1L665;
MM_RE_A[6] = DFFEA(MM_RE_A[6]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L772, , );


--MM_RE_4[6] is MM_RE_4[6] at LC_X34_Y26_N0
--operation mode is normal

MM_RE_4[6]_sload_eqn = A1L665;
MM_RE_4[6] = DFFEA(MM_RE_4[6]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L712, , );


--A1L614 is Mux~1249 at LC_X34_Y27_N6
--operation mode is normal

MM_RE_6[6]_qfbk = MM_RE_6[6];
A1L614 = AddrR_out[2] & (MM_RE_6[6]_qfbk # AddrR_out[3]) # !AddrR_out[2] & MM_RE_4[6] & !AddrR_out[3];

--MM_RE_6[6] is MM_RE_6[6] at LC_X34_Y27_N6
--operation mode is normal

MM_RE_6[6]_sload_eqn = A1L665;
MM_RE_6[6] = DFFEA(MM_RE_6[6]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L732, , );


--MM_RE_7[6] is MM_RE_7[6] at LC_X36_Y26_N6
--operation mode is normal

MM_RE_7[6]_lut_out = A1L665;
MM_RE_7[6] = DFFEA(MM_RE_7[6]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L742, , );


--A1L714 is Mux~1250 at LC_X34_Y27_N3
--operation mode is normal

MM_RE_5[6]_qfbk = MM_RE_5[6];
A1L714 = A1L614 & (MM_RE_7[6] # !AddrR_out[3]) # !A1L614 & AddrR_out[3] & MM_RE_5[6]_qfbk;

--MM_RE_5[6] is MM_RE_5[6] at LC_X34_Y27_N3
--operation mode is normal

MM_RE_5[6]_sload_eqn = A1L665;
MM_RE_5[6] = DFFEA(MM_RE_5[6]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L722, , );


--MM_RE_0[6] is MM_RE_0[6] at LC_X32_Y26_N0
--operation mode is normal

MM_RE_0[6]_sload_eqn = A1L665;
MM_RE_0[6] = DFFEA(MM_RE_0[6]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L771, , );


--A1L414 is Mux~1247 at LC_X31_Y25_N6
--operation mode is normal

MM_RE_1[6]_qfbk = MM_RE_1[6];
A1L414 = AddrR_out[3] & (MM_RE_1[6]_qfbk # AddrR_out[2]) # !AddrR_out[3] & MM_RE_0[6] & !AddrR_out[2];

--MM_RE_1[6] is MM_RE_1[6] at LC_X31_Y25_N6
--operation mode is normal

MM_RE_1[6]_sload_eqn = A1L665;
MM_RE_1[6] = DFFEA(MM_RE_1[6]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L781, , );


--MM_RE_3[6] is MM_RE_3[6] at LC_X33_Y25_N1
--operation mode is normal

MM_RE_3[6]_lut_out = A1L665;
MM_RE_3[6] = DFFEA(MM_RE_3[6]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L702, , );


--A1L514 is Mux~1248 at LC_X33_Y24_N8
--operation mode is normal

MM_RE_2[6]_qfbk = MM_RE_2[6];
A1L514 = A1L414 & (MM_RE_3[6] # !AddrR_out[2]) # !A1L414 & AddrR_out[2] & MM_RE_2[6]_qfbk;

--MM_RE_2[6] is MM_RE_2[6] at LC_X33_Y24_N8
--operation mode is normal

MM_RE_2[6]_sload_eqn = A1L665;
MM_RE_2[6] = DFFEA(MM_RE_2[6]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L791, , );


--A1L314 is Mux~1245 at LC_X33_Y24_N9
--operation mode is normal

A1L314 = AddrR_out[1] & (A1L714 # AddrR_out[0]) # !AddrR_out[1] & !AddrR_out[0] & A1L514;


--MM_RE_C[6] is MM_RE_C[6] at LC_X32_Y23_N7
--operation mode is normal

MM_RE_C[6]_lut_out = A1L665;
MM_RE_C[6] = DFFEA(MM_RE_C[6]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L792, , );


--A1L024 is Mux~1253 at LC_X32_Y27_N4
--operation mode is normal

MM_RE_E[6]_qfbk = MM_RE_E[6];
A1L024 = AddrR_out[2] & (AddrR_out[3] # MM_RE_E[6]_qfbk) # !AddrR_out[2] & !AddrR_out[3] & MM_RE_C[6];

--MM_RE_E[6] is MM_RE_E[6] at LC_X32_Y27_N4
--operation mode is normal

MM_RE_E[6]_sload_eqn = A1L665;
MM_RE_E[6] = DFFEA(MM_RE_E[6]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L713, , );


--MM_RE_F[6] is MM_RE_F[6] at LC_X36_Y26_N9
--operation mode is normal

MM_RE_F[6]_lut_out = A1L665;
MM_RE_F[6] = DFFEA(MM_RE_F[6]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L723, , );


--A1L124 is Mux~1254 at LC_X33_Y27_N7
--operation mode is normal

MM_RE_D[6]_qfbk = MM_RE_D[6];
A1L124 = A1L024 & (MM_RE_F[6] # !AddrR_out[3]) # !A1L024 & AddrR_out[3] & MM_RE_D[6]_qfbk;

--MM_RE_D[6] is MM_RE_D[6] at LC_X33_Y27_N7
--operation mode is normal

MM_RE_D[6]_sload_eqn = A1L665;
MM_RE_D[6] = DFFEA(MM_RE_D[6]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L703, , );


--R_out[6] is R_out[6] at LC_X39_Y21_N9
--operation mode is normal

R_out[6]_lut_out = A1L753 & (R_to_ALU[0] # R_out[6]) # !A1L753 & !R_to_ALU[0] & !R2[6];
R_out[6] = DFFEA(R_out[6]_lut_out, GLOBAL(clk), VCC, , reset, , );


--A1L221 is DataOut[6]~222 at LC_X35_Y24_N6
--operation mode is normal

A1L221 = LCELL(A1L221 & (R_out[6] # !DataOut_to_bus) # !A1L221 & R_out[6] & DataOut_to_bus);


--MM_RE_5[7] is MM_RE_5[7] at LC_X31_Y26_N6
--operation mode is normal

MM_RE_5[7]_lut_out = !A1L865;
MM_RE_5[7] = DFFEA(MM_RE_5[7]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L722, , );


--MM_RE_6[7] is MM_RE_6[7] at LC_X34_Y27_N9
--operation mode is normal

MM_RE_6[7]_lut_out = !A1L865;
MM_RE_6[7] = DFFEA(MM_RE_6[7]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L732, , );


--A1L524 is Mux~1259 at LC_X34_Y26_N6
--operation mode is normal

MM_RE_4[7]_qfbk = MM_RE_4[7];
A1L524 = AddrR_out[2] & (AddrR_out[3] # !MM_RE_6[7]) # !AddrR_out[2] & !AddrR_out[3] & MM_RE_4[7]_qfbk;

--MM_RE_4[7] is MM_RE_4[7] at LC_X34_Y26_N6
--operation mode is normal

MM_RE_4[7]_sload_eqn = A1L865;
MM_RE_4[7] = DFFEA(MM_RE_4[7]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L712, , );


--MM_RE_7[7] is MM_RE_7[7] at LC_X36_Y26_N4
--operation mode is normal

MM_RE_7[7]_lut_out = !A1L865;
MM_RE_7[7] = DFFEA(MM_RE_7[7]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L742, , );


--A1L624 is Mux~1260 at LC_X33_Y26_N3
--operation mode is normal

A1L624 = A1L524 & (!AddrR_out[3] # !MM_RE_7[7]) # !A1L524 & !MM_RE_5[7] & AddrR_out[3];


--MM_RE_9[7] is MM_RE_9[7] at LC_X34_Y24_N3
--operation mode is normal

MM_RE_9[7]_lut_out = !A1L865;
MM_RE_9[7] = DFFEA(MM_RE_9[7]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L762, , );


--A1L724 is Mux~1261 at LC_X35_Y26_N1
--operation mode is normal

MM_RE_8[7]_qfbk = MM_RE_8[7];
A1L724 = AddrR_out[3] & (AddrR_out[2] # !MM_RE_9[7]) # !AddrR_out[3] & !AddrR_out[2] & MM_RE_8[7]_qfbk;

--MM_RE_8[7] is MM_RE_8[7] at LC_X35_Y26_N1
--operation mode is normal

MM_RE_8[7]_sload_eqn = A1L865;
MM_RE_8[7] = DFFEA(MM_RE_8[7]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L752, , );


--A1L824 is Mux~1262 at LC_X35_Y26_N9
--operation mode is normal

MM_RE_A[7]_qfbk = MM_RE_A[7];
A1L824 = A1L724 & (MM_RE_B[7] # !AddrR_out[2]) # !A1L724 & AddrR_out[2] & MM_RE_A[7]_qfbk;

--MM_RE_A[7] is MM_RE_A[7] at LC_X35_Y26_N9
--operation mode is normal

MM_RE_A[7]_sload_eqn = A1L865;
MM_RE_A[7] = DFFEA(MM_RE_A[7]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L772, , );


--MM_RE_2[7] is MM_RE_2[7] at LC_X31_Y26_N4
--operation mode is normal

MM_RE_2[7]_lut_out = !A1L865;
MM_RE_2[7] = DFFEA(MM_RE_2[7]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L791, , );


--MM_RE_0[7] is MM_RE_0[7] at LC_X32_Y26_N2
--operation mode is normal

MM_RE_0[7]_lut_out = A1L865;
MM_RE_0[7] = DFFEA(MM_RE_0[7]_lut_out, GLOBAL(clk), GLOBAL(reset), , A1L771, , );


--A1L324 is Mux~1257 at LC_X31_Y25_N2
--operation mode is normal

MM_RE_1[7]_qfbk = MM_RE_1[7];
A1L324 = AddrR_out[3] & (AddrR_out[2] # MM_RE_1[7]_qfbk) # !AddrR_out[3] & MM_RE_0[7] & !AddrR_out[2];

--MM_RE_1[7] is MM_RE_1[7] at LC_X31_Y25_N2
--operation mode is normal

MM_RE_1[7]_sload_eqn = A1L865;
MM_RE_1[7] = DFFEA(MM_RE_1[7]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L781, , );


--A1L424 is Mux~1258 at LC_X31_Y25_N7
--operation mode is normal

MM_RE_3[7]_qfbk = MM_RE_3[7];
A1L424 = A1L324 & (MM_RE_3[7]_qfbk # !AddrR_out[2]) # !A1L324 & !MM_RE_2[7] & AddrR_out[2];

--MM_RE_3[7] is MM_RE_3[7] at LC_X31_Y25_N7
--operation mode is normal

MM_RE_3[7]_sload_eqn = A1L865;
MM_RE_3[7] = DFFEA(MM_RE_3[7]_sload_eqn, GLOBAL(clk), GLOBAL(reset), , A1L702, , );


--A1L224 is Mux~1255 at LC_X35_Y26_N8