wsm321.v

在MAXPULS II环境下

/*`define	SS0	4b'0000
`define	SS1	4b'0001
`define	SS2	4b'0010
`define	SS3	4b'0011
`define	SS4	4b'0100
`define	SS5	4b'0101
`define	SS6	4b'0110
`define	SS7	4b'0111
`define	SS8	4b'1000
`define	SS9	4b'1001*/

module wsm321(key1,key2,key3,key4,key5,hz1,hz1k,rst,start,sound,l1,l2,l3,TimeH,TimeL,Modu);
input key1,key2,key3,key4,key5,start,hz1,hz1k,rst;
output sound,l1,l2,l3;
output[3:0] TimeH,TimeL;
output[3:0] Modu;
reg l1,l2,l3,sound;
reg [3:0]Modu;
reg	[3:0]curSt,NextSt;
reg [3:0]TimeH,TimeL,TimeCountH,TimeCountL;
reg	set,TimerRun;
wire T30,T20,T10,T5,T3,T2;
always @ (posedge hz1k)
  begin
  if (key1==1) 
		Modu = 1;
  else if(key2 == 1)  
		Modu = 2;
  else if(key3 == 1)  
		Modu = 3;
  else if(key4 == 1)  
		Modu = 4;
  else if(key5 == 1)     
		Modu = 5;
end

always @(posedge hz1)
	begin:Counter
		if(set==1)
			{TimeCountH,TimeCountL} = 8'b0;
		else
		begin
			if(TimeCountL == 9)
		 	begin
		 		TimeCountH = TimeCountH + 1;
		 		TimeCountL = 0;
		 	end
		 	else
			begin
				TimeCountH = TimeCountH;
				TimeCountL = TimeCountL + 1;
			end
	 	end
	end	//end of Counter
	
	assign	T30 = (TimeCountH == 3)&(TimeCountL == 0);
	assign	T20 = (TimeCountH == 2)&(TimeCountL == 0);
	assign	T10 = (TimeCountH == 1)&(TimeCountL == 0);
	assign	T3  = (TimeCountH == 0)&(TimeCountL == 3);
	assign	T5  = (TimeCountH == 0)&(TimeCountL == 5);
	assign	T2  = (TimeCountH == 0)&(TimeCountL == 2);

	always @(posedge hz1)
	begin:DispTime
		if(TimerRun == 0)
		begin
			if(Modu == 1)
				{TimeH,TimeL} = 8'b01001001;
			else if(Modu == 2)
				{TimeH,TimeL} = 8'b00111001;
			else if(Modu == 3)
				{TimeH,TimeL} = 8'b00101001;
			else if(Modu == 4)
				{TimeH,TimeL} = 8'b00010110;
			else if(Modu == 5)
				{TimeH,TimeL} = 8'b00000011;

		end
		else
		begin
			if((TimeH == 0)&&(TimeL==0))
			begin
				{TimeH,TimeL} = 8'b0;
			end
			else if(TimeL == 0)
				begin
					TimeH = TimeH - 1;
					TimeL = 9;
				end
				else
				begin
					TimeH = TimeH;
					TimeL = TimeL - 1;
				end			
		end
	end//end of time

always @(posedge hz1 or posedge rst) 
begin
	if(rst)
		curSt <= 0;
	else
		curSt <= NextSt;
end

always @(curSt) 
begin: work
	case(curSt)
		0://idel
			begin
				set = 1;
				l1 = 0;
				l2 = 0;
				l3 = 0;

				if(start == 1)
				begin
					set = 1;
					if(Modu == 1)
						NextSt = 1;
					else if(Modu == 2)
						NextSt = 2;
					else if(Modu == 3)
						NextSt = 3;
					else if(Modu == 4)
						NextSt = 5;
					else if(Modu == 5)
						NextSt = 8;
				end
				else
					begin
					TimerRun = 0;
					NextSt = 0;
					end
			end
		1://wash 30
			begin
				TimerRun = 1;
				set = (T30)?1:0;
				l1 = 1;
				l2 = 0;
				l3 = 0;
				if(T30)
					NextSt = 4;
				else
					NextSt = 1;				
			end
		2://wash 20
			begin
				TimerRun = 1;
				set = T20;
				l1 = 1;
				l2 = 0;
				l3 = 0;
				if(T20)
					NextSt = 4;
				else
					NextSt = 2;				
			end
		3://wash 10
			begin
				TimerRun = 1;
				set = T10;
				l1 = 1;
				l2 = 0;
				l3 = 0;
				if(T10)
					NextSt = 4;
				else
					NextSt = 3;				
			end
		4://d 1
			begin
				TimerRun = 1;
				set = (T3)?1:0;
				l1 = 0;
				l2 = 0;
				l3 = 1;
				if(T3)
					NextSt = 5;
				else
					NextSt = 4;				
			end
		5://f 1
			begin
				TimerRun = 1;
				set = T5;
				l1 = 0;
				l2 = 1;
				l3 = 0;
				if(T5)
					NextSt = 6;
				else
					NextSt = 5;				
			end
		6://d2
			begin
				TimerRun = 1;
				set = T3;
				l1 = 0;
				l2 = 0;
				l3 = 1;
				if(T3)
					NextSt = 7;
				else
					NextSt = 6;				
			end
		7://f2
			begin
				TimerRun = 1;
				l1 = 0;
				l2 = 1;
				l3 = 0;
				set = T5;
				if(T5)
					NextSt = 8;
				else
					NextSt = 7;				
			end
		8://d3
			begin
				TimerRun = 1;
				set = T3;
				l1 = 0;
				l2 = 0;
				l3 = 1;
				if(T3)
					NextSt = 9;
				else
					NextSt = 8;				
			end
		9://finish
			begin
				TimerRun = 1;
				set = T2;
				l1 = 0;
				l2 = 0;
				l3 = 0;
				if(T2)
					NextSt = 0;
				else
					NextSt = 9;				
			end
		default:
			begin
				NextSt = 0;
				set = 1;
				TimerRun = 0;
				sound = 1;
			end
	endcase
end

endmodule