bicount.vhd

来自「完整的双向计数器VHDL 程序 大家参考」· VHDL 代码 · 共 38 行

library  ieee;
use ieee.std_logic_1164.all;
use ieee.std_logic_unsigned.all;

ENTITY BICOUNT IS
PORT (
	CLK,UPDN,CLR,LATCH1 : IN STD_LOGIC;
	COUT				: OUT STD_LOGIC_VECTOR(23 DOWNTO 0)
	);
END ENTITY;
ARCHITECTURE A OF BICOUNT IS
SIGNAL TLATCH,TCOUNT:STD_LOGIC_VECTOR(23 DOWNTO 0);
BEGIN 
	PROCESS(CLK,CLR)
	BEGIN
		IF(CLR='1')THEN
			TCOUNT<="000000000000000000000000";
	  	ELSIF(CLK'EVENT AND CLK='1')THEN
			IF(UPDN='1')THEN
			TCOUNT<=TCOUNT+1;
		ELSE
			TCOUNT<=TCOUNT-1;
			END IF;
		END IF;
	END PROCESS;
	PROCESS(LATCH1)
		BEGIN
			IF(LATCH1'EVENT AND LATCH1='1')THEN
			TLATCH<=TCOUNT;
			END IF;
		END PROCESS;	

COUT<=TLATCH;
END ARCHITECTURE;