📄 xiaolizi1588.tan.qmsg
字号:
{ "Info" "ITDB_FULL_CLOCK_REG_RESULT" "clk register tlm register dtime\[7\] 119.96 MHz 8.336 ns Internal " "Info: Clock \"clk\" has Internal fmax of 119.96 MHz between source register \"tlm\" and destination register \"dtime\[7\]\" (period= 8.336 ns)" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "4.002 ns + Longest register register " "Info: + Longest register to register delay is 4.002 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns tlm 1 REG LC_X22_Y23_N7 3 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X22_Y23_N7; Fanout = 3; REG Node = 'tlm'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "" { tlm } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 19 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.560 ns) + CELL(0.280 ns) 0.840 ns dtime~1091 2 COMB LC_X22_Y23_N8 5 " "Info: 2: + IC(0.560 ns) + CELL(0.280 ns) = 0.840 ns; Loc. = LC_X22_Y23_N8; Fanout = 5; COMB Node = 'dtime~1091'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "0.840 ns" { tlm dtime~1091 } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.800 ns) + CELL(0.183 ns) 1.823 ns dtime\[0\]~1093 3 COMB LC_X22_Y23_N2 5 " "Info: 3: + IC(0.800 ns) + CELL(0.183 ns) = 1.823 ns; Loc. = LC_X22_Y23_N2; Fanout = 5; COMB Node = 'dtime\[0\]~1093'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "0.983 ns" { dtime~1091 dtime[0]~1093 } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.357 ns) + CELL(0.366 ns) 2.546 ns dtime\[4\]~1107 4 COMB LC_X22_Y23_N3 4 " "Info: 4: + IC(0.357 ns) + CELL(0.366 ns) = 2.546 ns; Loc. = LC_X22_Y23_N3; Fanout = 4; COMB Node = 'dtime\[4\]~1107'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "0.723 ns" { dtime[0]~1093 dtime[4]~1107 } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.751 ns) + CELL(0.705 ns) 4.002 ns dtime\[7\] 5 REG LC_X25_Y23_N9 3 " "Info: 5: + IC(0.751 ns) + CELL(0.705 ns) = 4.002 ns; Loc. = LC_X25_Y23_N9; Fanout = 3; REG Node = 'dtime\[7\]'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "1.456 ns" { dtime[4]~1107 dtime[7] } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.534 ns 38.33 % " "Info: Total cell delay = 1.534 ns ( 38.33 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.468 ns 61.67 % " "Info: Total interconnect delay = 2.468 ns ( 61.67 % )" { } { } 0} } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "4.002 ns" { tlm dtime~1091 dtime[0]~1093 dtime[4]~1107 dtime[7] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "4.002 ns" { tlm dtime~1091 dtime[0]~1093 dtime[4]~1107 dtime[7] } { 0.000ns 0.560ns 0.800ns 0.357ns 0.751ns } { 0.000ns 0.280ns 0.183ns 0.366ns 0.705ns } } } } 0} { "Info" "ITDB_FULL_CLOCK_SKEW_RESULT" "0.000 ns - Smallest " "Info: - Smallest clock skew is 0.000 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.811 ns + Shortest register " "Info: + Shortest clock path from clock \"clk\" to destination register is 2.811 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.725 ns) 0.725 ns clk 1 CLK PIN_L2 88 " "Info: 1: + IC(0.000 ns) + CELL(0.725 ns) = 0.725 ns; Loc. = PIN_L2; Fanout = 88; CLK Node = 'clk'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "" { clk } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 13 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.544 ns) + CELL(0.542 ns) 2.811 ns dtime\[7\] 2 REG LC_X25_Y23_N9 3 " "Info: 2: + IC(1.544 ns) + CELL(0.542 ns) = 2.811 ns; Loc. = LC_X25_Y23_N9; Fanout = 3; REG Node = 'dtime\[7\]'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.086 ns" { clk dtime[7] } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.267 ns 45.07 % " "Info: Total cell delay = 1.267 ns ( 45.07 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.544 ns 54.93 % " "Info: Total interconnect delay = 1.544 ns ( 54.93 % )" { } { } 0} } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.811 ns" { clk dtime[7] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.811 ns" { clk clk~out0 dtime[7] } { 0.000ns 0.000ns 1.544ns } { 0.000ns 0.725ns 0.542ns } } } } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.811 ns - Longest register " "Info: - Longest clock path from clock \"clk\" to source register is 2.811 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.725 ns) 0.725 ns clk 1 CLK PIN_L2 88 " "Info: 1: + IC(0.000 ns) + CELL(0.725 ns) = 0.725 ns; Loc. = PIN_L2; Fanout = 88; CLK Node = 'clk'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "" { clk } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 13 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.544 ns) + CELL(0.542 ns) 2.811 ns tlm 2 REG LC_X22_Y23_N7 3 " "Info: 2: + IC(1.544 ns) + CELL(0.542 ns) = 2.811 ns; Loc. = LC_X22_Y23_N7; Fanout = 3; REG Node = 'tlm'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.086 ns" { clk tlm } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 19 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.267 ns 45.07 % " "Info: Total cell delay = 1.267 ns ( 45.07 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.544 ns 54.93 % " "Info: Total interconnect delay = 1.544 ns ( 54.93 % )" { } { } 0} } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.811 ns" { clk tlm } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.811 ns" { clk clk~out0 tlm } { 0.000ns 0.000ns 1.544ns } { 0.000ns 0.725ns 0.542ns } } } } 0} } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.811 ns" { clk dtime[7] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.811 ns" { clk clk~out0 dtime[7] } { 0.000ns 0.000ns 1.544ns } { 0.000ns 0.725ns 0.542ns } } } { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.811 ns" { clk tlm } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.811 ns" { clk clk~out0 tlm } { 0.000ns 0.000ns 1.544ns } { 0.000ns 0.725ns 0.542ns } } } } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.156 ns + " "Info: + Micro clock to output delay of source is 0.156 ns" { } { { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 19 -1 0 } } } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.010 ns + " "Info: + Micro setup delay of destination is 0.010 ns" { } { { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} { "Info" "ITDB_INVERTED_CLOCK_FOUND" "" "Info: Delay path is controlled by inverted clocks -- if clock duty cycle is 50, fmax is divided by two" { } { { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 19 -1 0 } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "4.002 ns" { tlm dtime~1091 dtime[0]~1093 dtime[4]~1107 dtime[7] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "4.002 ns" { tlm dtime~1091 dtime[0]~1093 dtime[4]~1107 dtime[7] } { 0.000ns 0.560ns 0.800ns 0.357ns 0.751ns } { 0.000ns 0.280ns 0.183ns 0.366ns 0.705ns } } } { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.811 ns" { clk dtime[7] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.811 ns" { clk clk~out0 dtime[7] } { 0.000ns 0.000ns 1.544ns } { 0.000ns 0.725ns 0.542ns } } } { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.811 ns" { clk tlm } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.811 ns" { clk clk~out0 tlm } { 0.000ns 0.000ns 1.544ns } { 0.000ns 0.725ns 0.542ns } } } } 0}
{ "Info" "ITDB_TSU_RESULT" "dtime\[4\] decide\[1\] clk 5.715 ns register " "Info: tsu for register \"dtime\[4\]\" (data pin = \"decide\[1\]\", clock pin = \"clk\") is 5.715 ns" { { "Info" "ITDB_FULL_DATA_PATH_RESULT" "8.516 ns + Longest pin register " "Info: + Longest pin to register delay is 8.516 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.972 ns) 0.972 ns decide\[1\] 1 PIN PIN_E13 4 " "Info: 1: + IC(0.000 ns) + CELL(0.972 ns) = 0.972 ns; Loc. = PIN_E13; Fanout = 4; PIN Node = 'decide\[1\]'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "" { decide[1] } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 14 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(3.925 ns) + CELL(0.366 ns) 5.263 ns dtime\[0\]~1092 2 COMB LC_X24_Y23_N7 4 " "Info: 2: + IC(3.925 ns) + CELL(0.366 ns) = 5.263 ns; Loc. = LC_X24_Y23_N7; Fanout = 4; COMB Node = 'dtime\[0\]~1092'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "4.291 ns" { decide[1] dtime[0]~1092 } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.794 ns) + CELL(0.280 ns) 6.337 ns dtime\[0\]~1093 3 COMB LC_X22_Y23_N2 5 " "Info: 3: + IC(0.794 ns) + CELL(0.280 ns) = 6.337 ns; Loc. = LC_X22_Y23_N2; Fanout = 5; COMB Node = 'dtime\[0\]~1093'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "1.074 ns" { dtime[0]~1092 dtime[0]~1093 } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.357 ns) + CELL(0.366 ns) 7.060 ns dtime\[4\]~1107 4 COMB LC_X22_Y23_N3 4 " "Info: 4: + IC(0.357 ns) + CELL(0.366 ns) = 7.060 ns; Loc. = LC_X22_Y23_N3; Fanout = 4; COMB Node = 'dtime\[4\]~1107'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "0.723 ns" { dtime[0]~1093 dtime[4]~1107 } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(0.751 ns) + CELL(0.705 ns) 8.516 ns dtime\[4\] 5 REG LC_X25_Y23_N5 5 " "Info: 5: + IC(0.751 ns) + CELL(0.705 ns) = 8.516 ns; Loc. = LC_X25_Y23_N5; Fanout = 5; REG Node = 'dtime\[4\]'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "1.456 ns" { dtime[4]~1107 dtime[4] } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.689 ns 31.58 % " "Info: Total cell delay = 2.689 ns ( 31.58 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.827 ns 68.42 % " "Info: Total interconnect delay = 5.827 ns ( 68.42 % )" { } { } 0} } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "8.516 ns" { decide[1] dtime[0]~1092 dtime[0]~1093 dtime[4]~1107 dtime[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "8.516 ns" { decide[1] decide[1]~out0 dtime[0]~1092 dtime[0]~1093 dtime[4]~1107 dtime[4] } { 0.000ns 0.000ns 3.925ns 0.794ns 0.357ns 0.751ns } { 0.000ns 0.972ns 0.366ns 0.280ns 0.366ns 0.705ns } } } } 0} { "Info" "ITDB_FULL_TSU_DELAY" "0.010 ns + " "Info: + Micro setup delay of destination is 0.010 ns" { } { { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk destination 2.811 ns - Shortest register " "Info: - Shortest clock path from clock \"clk\" to destination register is 2.811 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.725 ns) 0.725 ns clk 1 CLK PIN_L2 88 " "Info: 1: + IC(0.000 ns) + CELL(0.725 ns) = 0.725 ns; Loc. = PIN_L2; Fanout = 88; CLK Node = 'clk'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "" { clk } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 13 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.544 ns) + CELL(0.542 ns) 2.811 ns dtime\[4\] 2 REG LC_X25_Y23_N5 5 " "Info: 2: + IC(1.544 ns) + CELL(0.542 ns) = 2.811 ns; Loc. = LC_X25_Y23_N5; Fanout = 5; REG Node = 'dtime\[4\]'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.086 ns" { clk dtime[4] } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 18 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.267 ns 45.07 % " "Info: Total cell delay = 1.267 ns ( 45.07 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.544 ns 54.93 % " "Info: Total interconnect delay = 1.544 ns ( 54.93 % )" { } { } 0} } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.811 ns" { clk dtime[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.811 ns" { clk clk~out0 dtime[4] } { 0.000ns 0.000ns 1.544ns } { 0.000ns 0.725ns 0.542ns } } } } 0} } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "8.516 ns" { decide[1] dtime[0]~1092 dtime[0]~1093 dtime[4]~1107 dtime[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "8.516 ns" { decide[1] decide[1]~out0 dtime[0]~1092 dtime[0]~1093 dtime[4]~1107 dtime[4] } { 0.000ns 0.000ns 3.925ns 0.794ns 0.357ns 0.751ns } { 0.000ns 0.972ns 0.366ns 0.280ns 0.366ns 0.705ns } } } { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.811 ns" { clk dtime[4] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.811 ns" { clk clk~out0 dtime[4] } { 0.000ns 0.000ns 1.544ns } { 0.000ns 0.725ns 0.542ns } } } } 0}
{ "Info" "ITDB_FULL_TCO_RESULT" "clk dispmoney\[2\] money\[2\] 8.129 ns register " "Info: tco from clock \"clk\" to destination pin \"dispmoney\[2\]\" through register \"money\[2\]\" is 8.129 ns" { { "Info" "ITDB_FULL_CLOCK_PATH_RESULT" "clk source 2.811 ns + Longest register " "Info: + Longest clock path from clock \"clk\" to source register is 2.811 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.725 ns) 0.725 ns clk 1 CLK PIN_L2 88 " "Info: 1: + IC(0.000 ns) + CELL(0.725 ns) = 0.725 ns; Loc. = PIN_L2; Fanout = 88; CLK Node = 'clk'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "" { clk } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 13 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.544 ns) + CELL(0.542 ns) 2.811 ns money\[2\] 2 REG LC_X24_Y23_N0 11 " "Info: 2: + IC(1.544 ns) + CELL(0.542 ns) = 2.811 ns; Loc. = LC_X24_Y23_N0; Fanout = 11; REG Node = 'money\[2\]'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.086 ns" { clk money[2] } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 17 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "1.267 ns 45.07 % " "Info: Total cell delay = 1.267 ns ( 45.07 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "1.544 ns 54.93 % " "Info: Total interconnect delay = 1.544 ns ( 54.93 % )" { } { } 0} } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.811 ns" { clk money[2] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.811 ns" { clk clk~out0 money[2] } { 0.000ns 0.000ns 1.544ns } { 0.000ns 0.725ns 0.542ns } } } } 0} { "Info" "ITDB_FULL_TCO_DELAY" "0.156 ns + " "Info: + Micro clock to output delay of source is 0.156 ns" { } { { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 17 -1 0 } } } 0} { "Info" "ITDB_FULL_DATA_PATH_RESULT" "5.162 ns + Longest register pin " "Info: + Longest register to pin delay is 5.162 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(0.000 ns) 0.000 ns money\[2\] 1 REG LC_X24_Y23_N0 11 " "Info: 1: + IC(0.000 ns) + CELL(0.000 ns) = 0.000 ns; Loc. = LC_X24_Y23_N0; Fanout = 11; REG Node = 'money\[2\]'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "" { money[2] } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 17 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.025 ns) + CELL(0.280 ns) 1.305 ns dispmoney~112 2 COMB LC_X23_Y25_N8 1 " "Info: 2: + IC(1.025 ns) + CELL(0.280 ns) = 1.305 ns; Loc. = LC_X23_Y25_N8; Fanout = 1; COMB Node = 'dispmoney~112'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "1.305 ns" { money[2] dispmoney~112 } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 15 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.453 ns) + CELL(2.404 ns) 5.162 ns dispmoney\[2\] 3 PIN PIN_E14 0 " "Info: 3: + IC(1.453 ns) + CELL(2.404 ns) = 5.162 ns; Loc. = PIN_E14; Fanout = 0; PIN Node = 'dispmoney\[2\]'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "3.857 ns" { dispmoney~112 dispmoney[2] } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 15 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "2.684 ns 52.00 % " "Info: Total cell delay = 2.684 ns ( 52.00 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "2.478 ns 48.00 % " "Info: Total interconnect delay = 2.478 ns ( 48.00 % )" { } { } 0} } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "5.162 ns" { money[2] dispmoney~112 dispmoney[2] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.162 ns" { money[2] dispmoney~112 dispmoney[2] } { 0.000ns 1.025ns 1.453ns } { 0.000ns 0.280ns 2.404ns } } } } 0} } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "2.811 ns" { clk money[2] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "2.811 ns" { clk clk~out0 money[2] } { 0.000ns 0.000ns 1.544ns } { 0.000ns 0.725ns 0.542ns } } } { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "5.162 ns" { money[2] dispmoney~112 dispmoney[2] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "5.162 ns" { money[2] dispmoney~112 dispmoney[2] } { 0.000ns 1.025ns 1.453ns } { 0.000ns 0.280ns 2.404ns } } } } 0}
{ "Info" "ITDB_FULL_TPD_RESULT" "card dispmoney\[8\] 9.609 ns Longest " "Info: Longest tpd from source pin \"card\" to destination pin \"dispmoney\[8\]\" is 9.609 ns" { { "Info" "ITDB_NODE_DELAY" "IC(0.000 ns) + CELL(1.234 ns) 1.234 ns card 1 PIN PIN_K17 24 " "Info: 1: + IC(0.000 ns) + CELL(1.234 ns) = 1.234 ns; Loc. = PIN_K17; Fanout = 24; PIN Node = 'card'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "" { card } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 13 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(4.014 ns) + CELL(0.183 ns) 5.431 ns dispmoney~118 2 COMB LC_X23_Y23_N2 1 " "Info: 2: + IC(4.014 ns) + CELL(0.183 ns) = 5.431 ns; Loc. = LC_X23_Y23_N2; Fanout = 1; COMB Node = 'dispmoney~118'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "4.197 ns" { card dispmoney~118 } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 15 -1 0 } } } 0} { "Info" "ITDB_NODE_DELAY" "IC(1.774 ns) + CELL(2.404 ns) 9.609 ns dispmoney\[8\] 3 PIN PIN_D14 0 " "Info: 3: + IC(1.774 ns) + CELL(2.404 ns) = 9.609 ns; Loc. = PIN_D14; Fanout = 0; PIN Node = 'dispmoney\[8\]'" { } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "4.178 ns" { dispmoney~118 dispmoney[8] } "NODE_NAME" } "" } } { "../xiaolizi1588.v" "" { Text "E:/xiaolizi1588/xiaolizi1588.v" 15 -1 0 } } } 0} { "Info" "ITDB_TOTAL_CELL_DELAY" "3.821 ns 39.76 % " "Info: Total cell delay = 3.821 ns ( 39.76 % )" { } { } 0} { "Info" "ITDB_TOTAL_IC_DELAY" "5.788 ns 60.24 % " "Info: Total interconnect delay = 5.788 ns ( 60.24 % )" { } { } 0} } { { "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" "" { Report "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588_cmp.qrpt" Compiler "xiaolizi1588" "UNKNOWN" "V1" "E:/xiaolizi1588/xiaolizi1588/db/xiaolizi1588.quartus_db" { Floorplan "E:/xiaolizi1588/xiaolizi1588/" "" "9.609 ns" { card dispmoney~118 dispmoney[8] } "NODE_NAME" } "" } } { "d:/altera/quartus50/bin/Technology_Viewer.qrui" "" { "Technology Map Viewer" "d:/altera/quartus50/bin/Technology_Viewer.qrui" "9.609 ns" { card card~out0 dispmoney~118 dispmoney[8] } { 0.000ns 0.000ns 4.014ns 1.774ns } { 0.000ns 1.234ns 0.183ns 2.404ns } } } } 0}
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