p2s.rpt

用vhdl代码写的并行转串行的程序,波形图正确,已经在板子上运行过,良好

37   -> - - - - - - - * - - - - - - - | - * - - - - - - | <-- input3
LC117-> * * * * * * * * * * * * * * * | - * - - - - - - | <-- clk_2


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                   d:\test\p2s.rpt
p2s

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'C':

                 Logic cells placed in LAB 'C'
        +------- LC42 count5
        | +----- LC44 count4
        | | +--- LC34 count3
        | | | +- LC33 count1
        | | | | 
        | | | |   Other LABs fed by signals
        | | | |   that feed LAB 'C'
LC      | | | | | A B C D E F G H |     Logic cells that feed LAB 'C':
LC42 -> * * * * | - - * * * * * * | <-- count5
LC44 -> * * * * | - - * * * * * * | <-- count4
LC34 -> * * * * | - - * * * * * * | <-- count3
LC33 -> * * * * | - - * * * * * * | <-- count1

Pin
83   -> - - - - | - - - - - - - - | <-- clk
LC109-> - - - * | - - * - - - - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder0|result_node1
LC99 -> - - * - | - - * - - - - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder0|result_node3
LC102-> - * - - | - - * - - - - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder0|result_node4
LC107-> * - - - | - - * - - - - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder0|result_node5
LC121-> * * * * | * - * * * * * * | <-- count31
LC126-> * * * * | * - * * * * * * | <-- count30
LC128-> * * * * | * - * * * * * * | <-- count29
LC119-> * * * * | * - * * * * * * | <-- count28
LC100-> * * * * | * - * * * * * * | <-- count27
LC13 -> * * * * | * - * * * * * * | <-- count26
LC1  -> * * * * | * - * * * * * * | <-- count25
LC101-> * * * * | * - * * * * * * | <-- count24
LC98 -> * * * * | * - * * * * * * | <-- count23
LC97 -> * * * * | * - * * * * * * | <-- count22
LC89 -> * * * * | * - * * * * * * | <-- count21
LC90 -> * * * * | * - * * * * * * | <-- count20
LC91 -> * * * * | * - * * * * * * | <-- count19
LC9  -> * * * * | * - * * * * * * | <-- count18
LC3  -> * * * * | * - * * * * * * | <-- count17
LC93 -> * * * * | * - * * * * * * | <-- count16
LC68 -> * * * * | * - * * * * * * | <-- count15
LC67 -> * * * * | * - * * * * * * | <-- count14
LC65 -> * * * * | * - * * * * * * | <-- count13
LC54 -> * * * * | * - * * * * * * | <-- count12
LC50 -> * * * * | * - * * * * * * | <-- count11
LC115-> * * * * | * - * * * * * * | <-- count10
LC125-> * * * * | * - * * * * * * | <-- count9
LC58 -> * * * * | * - * * * * * * | <-- count8
LC74 -> * * * * | - - * * * * * * | <-- count7
LC57 -> * * * * | - - * * * * * * | <-- count6
LC104-> * * * * | - - * * * * * * | <-- count2
LC124-> * * * * | - - * * * * * * | <-- count0


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                   d:\test\p2s.rpt
p2s

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'D':

                 Logic cells placed in LAB 'D'
        +------- LC54 count12
        | +----- LC50 count11
        | | +--- LC58 count8
        | | | +- LC57 count6
        | | | | 
        | | | |   Other LABs fed by signals
        | | | |   that feed LAB 'D'
LC      | | | | | A B C D E F G H |     Logic cells that feed LAB 'D':
LC54 -> * * * * | * - * * * * * * | <-- count12
LC50 -> * * * * | * - * * * * * * | <-- count11
LC58 -> * * * * | * - * * * * * * | <-- count8
LC57 -> * * * * | - - * * * * * * | <-- count6

Pin
83   -> - - - - | - - - - - - - - | <-- clk
LC110-> - - - * | - - - * - - - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder0|result_node6
LC127-> - - * - | - - - * - - - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder1|result_node0
LC118-> - * - - | - - - * - - - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder1|result_node3
LC114-> * - - - | - - - * - - - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder1|result_node4
LC121-> * * * * | * - * * * * * * | <-- count31
LC126-> * * * * | * - * * * * * * | <-- count30
LC128-> * * * * | * - * * * * * * | <-- count29
LC119-> * * * * | * - * * * * * * | <-- count28
LC100-> * * * * | * - * * * * * * | <-- count27
LC13 -> * * * * | * - * * * * * * | <-- count26
LC1  -> * * * * | * - * * * * * * | <-- count25
LC101-> * * * * | * - * * * * * * | <-- count24
LC98 -> * * * * | * - * * * * * * | <-- count23
LC97 -> * * * * | * - * * * * * * | <-- count22
LC89 -> * * * * | * - * * * * * * | <-- count21
LC90 -> * * * * | * - * * * * * * | <-- count20
LC91 -> * * * * | * - * * * * * * | <-- count19
LC9  -> * * * * | * - * * * * * * | <-- count18
LC3  -> * * * * | * - * * * * * * | <-- count17
LC93 -> * * * * | * - * * * * * * | <-- count16
LC68 -> * * * * | * - * * * * * * | <-- count15
LC67 -> * * * * | * - * * * * * * | <-- count14
LC65 -> * * * * | * - * * * * * * | <-- count13
LC115-> * * * * | * - * * * * * * | <-- count10
LC125-> * * * * | * - * * * * * * | <-- count9
LC74 -> * * * * | - - * * * * * * | <-- count7
LC42 -> * * * * | - - * * * * * * | <-- count5
LC44 -> * * * * | - - * * * * * * | <-- count4
LC34 -> * * * * | - - * * * * * * | <-- count3
LC104-> * * * * | - - * * * * * * | <-- count2
LC33 -> * * * * | - - * * * * * * | <-- count1
LC124-> * * * * | - - * * * * * * | <-- count0


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                   d:\test\p2s.rpt
p2s

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'E':

                 Logic cells placed in LAB 'E'
        +------- LC68 count15
        | +----- LC67 count14
        | | +--- LC65 count13
        | | | +- LC74 count7
        | | | | 
        | | | |   Other LABs fed by signals
        | | | |   that feed LAB 'E'
LC      | | | | | A B C D E F G H |     Logic cells that feed LAB 'E':
LC68 -> * * * * | * - * * * * * * | <-- count15
LC67 -> * * * * | * - * * * * * * | <-- count14
LC65 -> * * * * | * - * * * * * * | <-- count13
LC74 -> * * * * | - - * * * * * * | <-- count7

Pin
83   -> - - - - | - - - - - - - - | <-- clk
LC108-> - - - * | - - - - * - - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder0|result_node7
LC113-> - - * - | - - - - * - - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder1|result_node5
LC123-> - * - - | - - - - * - - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder1|result_node6
LC120-> * - - - | - - - - * - - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder1|result_node7
LC121-> * * * * | * - * * * * * * | <-- count31
LC126-> * * * * | * - * * * * * * | <-- count30
LC128-> * * * * | * - * * * * * * | <-- count29
LC119-> * * * * | * - * * * * * * | <-- count28
LC100-> * * * * | * - * * * * * * | <-- count27
LC13 -> * * * * | * - * * * * * * | <-- count26
LC1  -> * * * * | * - * * * * * * | <-- count25
LC101-> * * * * | * - * * * * * * | <-- count24
LC98 -> * * * * | * - * * * * * * | <-- count23
LC97 -> * * * * | * - * * * * * * | <-- count22
LC89 -> * * * * | * - * * * * * * | <-- count21
LC90 -> * * * * | * - * * * * * * | <-- count20
LC91 -> * * * * | * - * * * * * * | <-- count19
LC9  -> * * * * | * - * * * * * * | <-- count18
LC3  -> * * * * | * - * * * * * * | <-- count17
LC93 -> * * * * | * - * * * * * * | <-- count16
LC54 -> * * * * | * - * * * * * * | <-- count12
LC50 -> * * * * | * - * * * * * * | <-- count11
LC115-> * * * * | * - * * * * * * | <-- count10
LC125-> * * * * | * - * * * * * * | <-- count9
LC58 -> * * * * | * - * * * * * * | <-- count8
LC57 -> * * * * | - - * * * * * * | <-- count6
LC42 -> * * * * | - - * * * * * * | <-- count5
LC44 -> * * * * | - - * * * * * * | <-- count4
LC34 -> * * * * | - - * * * * * * | <-- count3
LC104-> * * * * | - - * * * * * * | <-- count2
LC33 -> * * * * | - - * * * * * * | <-- count1
LC124-> * * * * | - - * * * * * * | <-- count0


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                   d:\test\p2s.rpt
p2s

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'F':

                 Logic cells placed in LAB 'F'
        +------- LC89 count21
        | +----- LC90 count20
        | | +--- LC91 count19
        | | | +- LC93 count16
        | | | | 
        | | | |   Other LABs fed by signals
        | | | |   that feed LAB 'F'
LC      | | | | | A B C D E F G H |     Logic cells that feed LAB 'F':
LC89 -> * * * * | * - * * * * * * | <-- count21
LC90 -> * * * * | * - * * * * * * | <-- count20
LC91 -> * * * * | * - * * * * * * | <-- count19
LC93 -> * * * * | * - * * * * * * | <-- count16

Pin
83   -> - - - - | - - - - - - - - | <-- clk
LC116-> - - - * | - - - - - * - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder2|result_node0
LC15 -> - - * - | - - - - - * - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder2|result_node3
LC10 -> - * - - | - - - - - * - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder2|result_node4
LC8  -> * - - - | - - - - - * - - | <-- |LPM_ADD_SUB:287|addcore:adder|addcore:adder2|result_node5
LC121-> * * * * | * - * * * * * * | <-- count31
LC126-> * * * * | * - * * * * * * | <-- count30
LC128-> * * * * | * - * * * * * * | <-- count29
LC119-> * * * * | * - * * * * * * | <-- count28
LC100-> * * * * | * - * * * * * * | <-- count27
LC13 -> * * * * | * - * * * * * * | <-- count26
LC1  -> * * * * | * - * * * * * * | <-- count25
LC101-> * * * * | * - * * * * * * | <-- count24
LC98 -> * * * * | * - * * * * * * | <-- count23
LC97 -> * * * * | * - * * * * * * | <-- count22
LC9  -> * * * * | * - * * * * * * | <-- count18
LC3  -> * * * * | * - * * * * * * | <-- count17
LC68 -> * * * * | * - * * * * * * | <-- count15
LC67 -> * * * * | * - * * * * * * | <-- count14
LC65 -> * * * * | * - * * * * * * | <-- count13
LC54 -> * * * * | * - * * * * * * | <-- count12
LC50 -> * * * * | * - * * * * * * | <-- count11