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📄 control.rpt

📁 本程序是用VHDL语言实现异步通信控制器
💻 RPT
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字号:
   -     38    C       TFFE   +  t        0      0   0    4    6    1    4  count24 (:22)
 (28)    40    C       TFFE   +  t        0      0   0    4    4    1    4  count23 (:23)
   -     42    C       TFFE   +  t        0      0   0    4    6    1    5  count22 (:24)
   -     43    C       TFFE   +  t        0      0   0    4    6    1    5  count21 (:25)
   -     44    C       TFFE   +  t        1      0   1    4    6    1    5  count20 (:26)
 (39)    57    D       TFFE   +  t        1      1   0    4    9    1    1  clk2 (:28)
   -     59    D       DFFE   +  t        3      2   1    4    9    0    8  count35 (:29)
   -     61    D       DFFE   +  t        3      2   1    4    9    0   10  count34 (:30)
   -     50    D       TFFE   +  t        3      0   0    4    8    0   10  count33 (:31)
 (34)    51    D       TFFE   +  t        0      0   0    4    7    0   11  count32 (:32)
 (36)    52    D       DFFE   +  t        1      0   0    4    7    0   11  count31 (:33)
 (37)    53    D       TFFE   +  t        0      0   0    4    2    0   12  count30 (:34)
 (25)    35    C       DFFE      t        0      0   0    1    6    1    4  count43 (:35)
 (26)    36    C       TFFE      t        0      0   0    0    3    1    4  count42 (:36)
 (19)    20    B       DFFE      t        0      0   0    0    6    1    6  count41 (:37)
 (27)    37    C       TFFE      t        0      0   0    1    5    1    6  count40 (:38)


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
! = NOT gate push-back
r = Fitter-inserted logic cell


Device-Specific Information:                               d:\zong\control.rpt
control

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'B':

                 Logic cells placed in LAB 'B'
        +------- LC17 LDRB
        | +----- LC24 |LPM_ADD_SUB:1415|addcore:adder|addcore:adder0|result_node1
        | | +--- LC22 |LPM_ADD_SUB:1415|addcore:adder|addcore:adder0|result_node3
        | | | +- LC20 count41
        | | | | 
        | | | |   Other LABs fed by signals
        | | | |   that feed LAB 'B'
LC      | | | | | A B C D |     Logic cells that feed LAB 'B':
LC24 -> - - - * | - * - - | <-- |LPM_ADD_SUB:1415|addcore:adder|addcore:adder0|result_node1
LC20 -> * * * * | - * * - | <-- count41

Pin
43   -> - - - - | - - - - | <-- RXC
LC33 -> * - - * | - * * - | <-- RXEN
LC35 -> * - * * | - * * - | <-- count43
LC36 -> * - * * | - * * - | <-- count42
LC37 -> * * * * | - * * - | <-- count40


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                               d:\zong\control.rpt
control

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'C':

                                         Logic cells placed in LAB 'C'
        +------------------------------- LC33 RXEN
        | +----------------------------- LC34 start
        | | +--------------------------- LC48 st
        | | | +------------------------- LC47 count14
        | | | | +----------------------- LC46 count13
        | | | | | +--------------------- LC45 count12
        | | | | | | +------------------- LC41 count11
        | | | | | | | +----------------- LC39 count10
        | | | | | | | | +--------------- LC38 count24
        | | | | | | | | | +------------- LC40 count23
        | | | | | | | | | | +----------- LC42 count22
        | | | | | | | | | | | +--------- LC43 count21
        | | | | | | | | | | | | +------- LC44 count20
        | | | | | | | | | | | | | +----- LC35 count43
        | | | | | | | | | | | | | | +--- LC36 count42
        | | | | | | | | | | | | | | | +- LC37 count40
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'C'
LC      | | | | | | | | | | | | | | | | | A B C D |     Logic cells that feed LAB 'C':
LC33 -> * - - - - - - - - - - - - * * * | - * * - | <-- RXEN
LC34 -> - * * * * * * * - - - - - - - - | - - * * | <-- start
LC48 -> * - * - - - - - * * * * * - - - | - - * - | <-- st
LC47 -> - * - * * - - * - - - - - - - - | - - * - | <-- count14
LC46 -> - * - * * - - * - - - - - - - - | - - * - | <-- count13
LC45 -> - * - * * * - * - - - - - - - - | - - * - | <-- count12
LC41 -> - * - * * * * * - - - - - - - - | - - * - | <-- count11
LC39 -> - * - * * * * * - - - - - - - - | - - * - | <-- count10
LC38 -> * - - - - - - - * - * * * - - - | - - * - | <-- count24
LC40 -> * - - - - - - - * * * * * - - - | - - * - | <-- count23
LC42 -> * - - - - - - - * * * * * - - - | - - * - | <-- count22
LC43 -> * - - - - - - - * * * * * - - - | - - * - | <-- count21
LC44 -> * - - - - - - - * * * * * - - - | - - * - | <-- count20
LC35 -> - - - - - - - - - - - - - * - * | - * * - | <-- count43
LC36 -> - - - - - - - - - - - - - * * * | - * * - | <-- count42
LC37 -> - - - - - - - - - - - - - * * * | - * * - | <-- count40

Pin
12   -> * * * * * * * * * * * * * - - - | - - * * | <-- CS
7    -> * * * * * * * * * * * * * - - - | - - * * | <-- RD
11   -> * * * * * * * * * * * * * - - - | - - * * | <-- RESET
43   -> - - - - - - - - - - - - - - - - | - - - - | <-- RXC
9    -> - * * * * * * * - - - - - * - * | - - * * | <-- RXD
8    -> * * * * * * * * * * * * * - - - | - - * * | <-- WR
LC17 -> - * - * * * * * - - - - - - - - | - - * * | <-- LDRB
LC22 -> - - - - - - - - - - - - - * - - | - - * - | <-- |LPM_ADD_SUB:1415|addcore:adder|addcore:adder0|result_node3
LC20 -> - - - - - - - - - - - - - * * * | - * * - | <-- count41


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                               d:\zong\control.rpt
control

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'D':

                                         Logic cells placed in LAB 'D'
        +------------------------------- LC56 FE
        | +----------------------------- LC64 LDSR
        | | +--------------------------- LC62 |LPM_ADD_SUB:884|addcore:adder|addcore:adder0|result_node4
        | | | +------------------------- LC60 |LPM_ADD_SUB:884|addcore:adder|addcore:adder0|result_node5
        | | | | +----------------------- LC58 |LPM_ADD_SUB:941|addcore:adder|addcore:adder0|gcp2
        | | | | | +--------------------- LC55 |LPM_ADD_SUB:941|addcore:adder|addcore:adder0|result_node4
        | | | | | | +------------------- LC54 |LPM_ADD_SUB:941|addcore:adder|addcore:adder0|result_node5
        | | | | | | | +----------------- LC49 SCLK
        | | | | | | | | +--------------- LC63 t
        | | | | | | | | | +------------- LC57 clk2
        | | | | | | | | | | +----------- LC59 count35
        | | | | | | | | | | | +--------- LC61 count34
        | | | | | | | | | | | | +------- LC50 count33
        | | | | | | | | | | | | | +----- LC51 count32
        | | | | | | | | | | | | | | +--- LC52 count31
        | | | | | | | | | | | | | | | +- LC53 count30
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'D'
LC      | | | | | | | | | | | | | | | | | A B C D |     Logic cells that feed LAB 'D':
LC62 -> - - - - - - - - - - - * - - - - | - - - * | <-- |LPM_ADD_SUB:884|addcore:adder|addcore:adder0|result_node4
LC60 -> - - - - - - - - - - * - - - - - | - - - * | <-- |LPM_ADD_SUB:884|addcore:adder|addcore:adder0|result_node5
LC58 -> - - - - - - - - - - - - * - - - | - - - * | <-- |LPM_ADD_SUB:941|addcore:adder|addcore:adder0|gcp2
LC55 -> - - - - - - - - - - - * - - - - | - - - * | <-- |LPM_ADD_SUB:941|addcore:adder|addcore:adder0|result_node4
LC54 -> - - - - - - - - - - * - - - - - | - - - * | <-- |LPM_ADD_SUB:941|addcore:adder|addcore:adder0|result_node5
LC63 -> - * - - - - - - * - - - - - - - | - - - * | <-- t
LC57 -> - - - - - - - * - * - - - - - - | - - - * | <-- clk2
LC59 -> - - - * - - * - - * * * * * * - | - - - * | <-- count35
LC61 -> - - * * - * * - - * * * * * * - | - - - * | <-- count34
LC50 -> - - * * - * * - - * * * * * * - | - - - * | <-- count33
LC51 -> - - * * * * * - - * * * * * * - | - - - * | <-- count32
LC52 -> - - * * * * * - - * * * * * * - | - - - * | <-- count31
LC53 -> - - * * * * * - - * * * * * * * | - - - * | <-- count30

Pin
12   -> - - - - - - - - * * * * * * * * | - - * * | <-- CS
7    -> - - - - - - - - * * * * * * * * | - - * * | <-- RD
11   -> - - - - - - - - * * * * * * * * | - - * * | <-- RESET
43   -> - - - - - - - - - - - - - - - - | - - - - | <-- RXC
9    -> * - - - - - - - * - - - - - - - | - - * * | <-- RXD
8    -> - - - - - - - - * * * * * * * * | - - * * | <-- WR
LC17 -> * - - - - - - * * * - - - - - - | - - * * | <-- LDRB
LC34 -> * * - - - - - - * * * * * * * * | - - * * | <-- start


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                               d:\zong\control.rpt
control

** EQUATIONS **

CS       : INPUT;
RD       : INPUT;
RESET    : INPUT;
RXC      : INPUT;
RXD      : INPUT;
WR       : INPUT;

-- Node name is ':28' = 'clk2' 
-- Equation name is 'clk2', location is LC057, type is buried.
clk2     = TFFE( _EQ001, GLOBAL( RXC),  VCC,  VCC,  VCC);
  _EQ001 = !count30 & !count31 & !count32 & !count33 & !count34 & !count35 & 
             !CS & !RD &  RESET &  start &  WR
         #  clk2 & !CS &  LDRB & !RD &  RESET &  start &  WR &  _X001;
  _X001  = EXP(!count30 & !count31 & !count32 & !count33 & !count34 & !count35);

-- Node name is ':20' = 'count10' 
-- Equation name is 'count10', location is LC039, type is buried.
count10  = TFFE( _EQ002, GLOBAL( RXC),  VCC,  VCC,  VCC);
  _EQ002 =  count10 & !CS &  LDRB & !RD &  RESET &  RXD &  start &  WR
         # !count10 & !CS & !RD &  RESET & !RXD & !start &  WR &  _X002
         #  count10 & !CS & !RD &  RESET & !RXD & !start &  WR;
  _X002  = EXP( count11 &  count12 & !count13 &  count14);

-- Node name is ':19' = 'count11' 
-- Equation name is 'count11', location is LC041, type is buried.
count11  = TFFE( _EQ003, GLOBAL( RXC),  VCC,  VCC,  VCC);
  _EQ003 =  count11 & !CS &  LDRB & !RD &  RESET &  RXD &  start &  WR
         #  count10 & !CS & !RD &  RESET & !RXD & !start &  WR;

-- Node name is ':18' = 'count12' 
-- Equation name is 'count12', location is LC045, type is buried.
count12  = TFFE( _EQ004, GLOBAL( RXC),  VCC,  VCC,  VCC);
  _EQ004 =  count12 & !CS &  LDRB & !RD &  RESET &  RXD &  start &  WR
         #  count10 &  count11 & !CS & !RD &  RESET & !RXD & !start &  WR;

-- Node name is ':17' = 'count13' 
-- Equation name is 'count13', location is LC046, type is buried.
count13  = TFFE( _EQ005, GLOBAL( RXC),  VCC,  VCC,  VCC);
  _EQ005 =  count10 &  count11 &  count12 & !count13 & !CS & !RD &  RESET & 
             !RXD & !start &  WR &  _X003
         #  count10 &  count11 &  count12 &  count13 & !CS & !RD &  RESET & 
             !RXD & !start &  WR
         #  count13 & !CS &  LDRB & !RD &  RESET &  RXD &  start &  WR;
  _X003  = EXP(!count10 &  count11 &  count12 &  count14);

-- Node name is ':16' = 'count14' 
-- Equation name is 'count14', location is LC047, type is buried.
count14  = TFFE( _EQ006, GLOBAL( RXC),  VCC,  VCC,  VCC);
  _EQ006 =  count10 &  count11 &  count12 &  count13 &  count14 & !CS & !RD & 
              RESET & !RXD & !start &  WR &  _X004
         #  count10 &  count11 &  count12 &  count13 & !count14 & !CS & !RD & 
              RESET & !RXD & !start &  WR
         #  count14 & !CS &  LDRB & !RD &  RESET &  RXD &  start &  WR;
  _X004  = EXP(!count10 &  count11 &  count12 & !count13);

-- Node name is ':26' = 'count20' 
-- Equation name is 'count20', location is LC044, type is buried.
count20  = TFFE( _EQ007, GLOBAL( RXC),  VCC,  VCC,  VCC);
  _EQ007 = !count20 &  count23 & !CS & !RD &  RESET &  st &  WR
         # !count20 & !count24 & !CS & !RD &  RESET &  st &  WR
         # !count20 & !count22 & !CS & !RD &  RESET &  st &  WR
         # !count20 & !count21 & !CS & !RD &  RESET &  st &  WR
         #  count20 & !CS & !RD &  RESET &  st &  WR;

-- Node name is ':25' = 'count21' 
-- Equation name is 'count21', location is LC043, type is buried.
count21  = TFFE( _EQ008, GLOBAL( RXC),  VCC,  VCC,  VCC);
  _EQ008 =  count21 &  count22 & !count23 &  count24 & !CS & !RD &  RESET & 
              st &  WR
         #  count20 & !CS & !RD &  RESET &  st &  WR;

-- Node name is ':24' = 'count22' 
-- Equation name is 'count22', location is LC042, type is buried.
count22  = TFFE( _EQ009, GLOBAL( RXC),  VCC,  VCC,  VCC);
  _EQ009 =  count21 &  count22 & !count23 &  count24 & !CS & !RD &  RESET & 
              st &  WR
         #  count20 &  count21 & !CS & !RD &  RESET &  st &  WR;

-- Node name is ':23' = 'count23' 
-- Equation name is 'count23', location is LC040, type is buried.
count23  = TFFE( _EQ010, GLOBAL( RXC),  VCC,  VCC,  VCC);
  _EQ010 =  count20 &  count21 &  count22 & !CS & !RD &  RESET &  st &  WR;

-- Node name is ':22' = 'count24' 
-- Equation name is 'count24', location is LC038, type is buried.

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