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📄 receiver.rpt

📁 本程序是用VHDL语言实现异步通信控制器
💻 RPT
📖 第 1 页 / 共 4 页
字号:
 (31)    46    C       TFFE   +  t        0      0   0    5    4    0    6  |control:u1|count11 (|control:u1|:19)
   -     45    C       TFFE   +  t        1      0   0    5    7    0    6  |control:u1|count10 (|control:u1|:20)
 (13)    32    B       TFFE   +  t        0      0   0    4    6    0    5  |control:u1|count24 (|control:u1|:22)
   -     31    B       TFFE   +  t        0      0   0    4    4    0    5  |control:u1|count23 (|control:u1|:23)
 (14)    30    B       TFFE   +  t        0      0   0    4    6    0    6  |control:u1|count22 (|control:u1|:24)
   -     29    B       TFFE   +  t        0      0   0    4    6    0    6  |control:u1|count21 (|control:u1|:25)
   -     27    B       TFFE   +  t        1      0   1    4    6    0    6  |control:u1|count20 (|control:u1|:26)
   -     18    B       TFFE   +  t        0      0   0    4    6    1   12  |control:u1|clk1 (|control:u1|:27)
   -     55    D       TFFE   +  t        1      1   0    4    9    1    1  |control:u1|clk2 (|control:u1|:28)
   -     63    D       DFFE   +  t        3      2   1    4    9    0    8  |control:u1|count35 (|control:u1|:29)
 (41)    64    D       DFFE   +  t        3      2   1    4    9    0   10  |control:u1|count34 (|control:u1|:30)
 (39)    57    D       TFFE   +  t        3      0   0    4    8    0   10  |control:u1|count33 (|control:u1|:31)
   -     59    D       TFFE   +  t        0      0   0    4    7    0   11  |control:u1|count32 (|control:u1|:32)
   -     61    D       DFFE   +  t        1      0   0    4    7    0   11  |control:u1|count31 (|control:u1|:33)
 (40)    62    D       TFFE   +  t        0      0   0    4    2    0   12  |control:u1|count30 (|control:u1|:34)
 (12)     1    A       DFFE      t        0      0   0    1    6    1    4  |control:u1|count43 (|control:u1|:35)
 (11)     3    A       TFFE      t        0      0   0    0    3    1    4  |control:u1|count42 (|control:u1|:36)
  (9)     4    A       DFFE      t        0      0   0    0    6    1    6  |control:u1|count41 (|control:u1|:37)
  (8)     5    A       TFFE      t        0      0   0    1    5    1    6  |control:u1|count40 (|control:u1|:38)
 (24)    33    C       DFFE      t        0      0   0    1    5    1    6  |shifter:u2|temp8 (|shifter:u2|:19)
   -     38    C       DFFE      t        0      0   0    0    6    1    6  |shifter:u2|temp7 (|shifter:u2|:20)
   -     42    C       DFFE      t        0      0   0    0    6    2    2  |shifter:u2|temp6 (|shifter:u2|:21)
 (28)    40    C       DFFE      t        0      0   0    0    6    2    2  |shifter:u2|temp5 (|shifter:u2|:22)
 (27)    37    C       DFFE      t        0      0   0    0    6    1    6  |shifter:u2|temp4 (|shifter:u2|:23)
 (26)    36    C       DFFE      t        0      0   0    0    6    1    6  |shifter:u2|temp3 (|shifter:u2|:24)
 (25)    35    C       DFFE      t        0      0   0    0    6    1    6  |shifter:u2|temp2 (|shifter:u2|:25)
   -     34    C       DFFE      t        0      0   0    0    6    1    5  |shifter:u2|temp1 (|shifter:u2|:26)
   -     12    A       SOFT    s t        0      0   0    2    0    1    0  |shifter:u2|~799~1
   -      2    A       SOFT    s t       14      0   1    2    9    1    0  |shifter:u2|~875~1
   -     22    B       SOFT    s t        1      0   1    0    6    0    1  |shifter:u2|~875~2
   -     28    B       SOFT    s t        1      0   1    0    6    0    1  |shifter:u2|~875~3
   -     26    B       SOFT    s t        1      0   1    0    6    0    1  |shifter:u2|~875~4


Code:

s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
! = NOT gate push-back
r = Fitter-inserted logic cell


Device-Specific Information:                              d:\zong\receiver.rpt
receiver

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'A':

                               Logic cells placed in LAB 'A'
        +--------------------- LC6 |control:u1|LPM_ADD_SUB:1415|addcore:adder|addcore:adder0|result_node1
        | +------------------- LC7 |control:u1|LPM_ADD_SUB:1415|addcore:adder|addcore:adder0|result_node3
        | | +----------------- LC1 |control:u1|count43
        | | | +--------------- LC3 |control:u1|count42
        | | | | +------------- LC4 |control:u1|count41
        | | | | | +----------- LC5 |control:u1|count40
        | | | | | | +--------- LC8 OVERFLOW
        | | | | | | | +------- LC16 RBF
        | | | | | | | | +----- LC11 RX_buf6
        | | | | | | | | | +--- LC12 |shifter:u2|~799~1
        | | | | | | | | | | +- LC2 |shifter:u2|~875~1
        | | | | | | | | | | | 
        | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | |   that feed LAB 'A'
LC      | | | | | | | | | | | | A B C D |     Logic cells that feed LAB 'A':
LC6  -> - - - - * - - - - - - | * - - - | <-- |control:u1|LPM_ADD_SUB:1415|addcore:adder|addcore:adder0|result_node1
LC7  -> - - * - - - - - - - - | * - - - | <-- |control:u1|LPM_ADD_SUB:1415|addcore:adder|addcore:adder0|result_node3
LC1  -> - * * - * * - * - - - | * - - - | <-- |control:u1|count43
LC3  -> - * * * * * - * - - - | * - - - | <-- |control:u1|count42
LC4  -> * * * * * * - * - - - | * - - - | <-- |control:u1|count41
LC5  -> * * * * * * - * - - - | * - - - | <-- |control:u1|count40
LC16 -> - - - - - - * - * - - | * * * * | <-- RBF

Pin
5    -> - - - - - - * - - * * | * - * - | <-- A0
43   -> - - - - - - - - - - - | - - - - | <-- RXC
11   -> - - * - - * - - - - - | * - * * | <-- RXD
13   -> - - - - - - - - - * * | * - * - | <-- TBE
LC18 -> - - * * * * - * - - - | * - * - | <-- |control:u1|clk1
LC33 -> - - - - - - - - - - * | * * * - | <-- |shifter:u2|temp8
LC38 -> - - - - - - - - - - * | * * * - | <-- |shifter:u2|temp7
LC42 -> - - - - - - - - * - - | * - * - | <-- |shifter:u2|temp6
LC37 -> - - - - - - - - - - * | * * * - | <-- |shifter:u2|temp4
LC36 -> - - - - - - - - - - * | * * * - | <-- |shifter:u2|temp3
LC35 -> - - - - - - - - - - * | * * * - | <-- |shifter:u2|temp2
LC34 -> - - - - - - - - - - * | * * * - | <-- |shifter:u2|temp1
LC22 -> - - - - - - - - - - * | * - - - | <-- |shifter:u2|~875~2
LC28 -> - - - - - - - - - - * | * - - - | <-- |shifter:u2|~875~3
LC26 -> - - - - - - - - - - * | * - - - | <-- |shifter:u2|~875~4


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                              d:\zong\receiver.rpt
receiver

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'B':

                                       Logic cells placed in LAB 'B'
        +----------------------------- LC32 |control:u1|count24
        | +--------------------------- LC31 |control:u1|count23
        | | +------------------------- LC30 |control:u1|count22
        | | | +----------------------- LC29 |control:u1|count21
        | | | | +--------------------- LC27 |control:u1|count20
        | | | | | +------------------- LC18 |control:u1|clk1
        | | | | | | +----------------- LC25 RX_buf0
        | | | | | | | +--------------- LC24 RX_buf1
        | | | | | | | | +------------- LC21 RX_buf2
        | | | | | | | | | +----------- LC19 RX_buf3
        | | | | | | | | | | +--------- LC17 RX_buf4
        | | | | | | | | | | | +------- LC20 RX_buf5
        | | | | | | | | | | | | +----- LC22 |shifter:u2|~875~2
        | | | | | | | | | | | | | +--- LC28 |shifter:u2|~875~3
        | | | | | | | | | | | | | | +- LC26 |shifter:u2|~875~4
        | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | |   that feed LAB 'B'
LC      | | | | | | | | | | | | | | | | A B C D |     Logic cells that feed LAB 'B':
LC32 -> * - * * * * - - - - - - - - - | - * - - | <-- |control:u1|count24
LC31 -> * * * * * * - - - - - - - - - | - * - - | <-- |control:u1|count23
LC30 -> * * * * * * - - - - - - - - - | - * - - | <-- |control:u1|count22
LC29 -> * * * * * * - - - - - - - - - | - * - - | <-- |control:u1|count21
LC27 -> * * * * * * - - - - - - - - - | - * - - | <-- |control:u1|count20

Pin
14   -> * * * * * * - - - - - - - - - | - * * * | <-- CS
8    -> * * * * * * - - - - - - - - - | - * * * | <-- RD
9    -> * * * * * * - - - - - - - - - | - * * * | <-- RESET
43   -> - - - - - - - - - - - - - - - | - - - - | <-- RXC
12   -> * * * * * * - - - - - - - - - | - * * * | <-- WR
LC54 -> * * * * * * - - - - - - - - - | - * - * | <-- |control:u1|st
LC16 -> - - - - - - * * * * * * - - - | * * * * | <-- RBF
LC33 -> - - - - - - - - - - * - * * * | * * * - | <-- |shifter:u2|temp8
LC38 -> - - - - - - - - - - - * * * * | * * * - | <-- |shifter:u2|temp7
LC37 -> - - - - - - * - - - - - * * * | * * * - | <-- |shifter:u2|temp4
LC36 -> - - - - - - - * - - - - * * * | * * * - | <-- |shifter:u2|temp3
LC35 -> - - - - - - - - * - - - * * * | * * * - | <-- |shifter:u2|temp2
LC34 -> - - - - - - - - - * - - * * * | * * * - | <-- |shifter:u2|temp1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                              d:\zong\receiver.rpt
receiver

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'C':

                                         Logic cells placed in LAB 'C'
        +------------------------------- LC39 |control:u1|start
        | +----------------------------- LC43 |control:u1|t
        | | +--------------------------- LC44 |control:u1|count14
        | | | +------------------------- LC48 |control:u1|count13
        | | | | +----------------------- LC47 |control:u1|count12
        | | | | | +--------------------- LC46 |control:u1|count11
        | | | | | | +------------------- LC45 |control:u1|count10
        | | | | | | | +----------------- LC41 PE
        | | | | | | | | +--------------- LC33 |shifter:u2|temp8
        | | | | | | | | | +------------- LC38 |shifter:u2|temp7
        | | | | | | | | | | +----------- LC42 |shifter:u2|temp6
        | | | | | | | | | | | +--------- LC40 |shifter:u2|temp5
        | | | | | | | | | | | | +------- LC37 |shifter:u2|temp4
        | | | | | | | | | | | | | +----- LC36 |shifter:u2|temp3
        | | | | | | | | | | | | | | +--- LC35 |shifter:u2|temp2
        | | | | | | | | | | | | | | | +- LC34 |shifter:u2|temp1
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'C'
LC      | | | | | | | | | | | | | | | | | A B C D |     Logic cells that feed LAB 'C':
LC39 -> * * * * * * * - * * * * * * * * | - - * * | <-- |control:u1|start
LC43 -> - * - - - - - - * * * * * * * * | - - * - | <-- |control:u1|t
LC44 -> * - * * - - * - - - - - - - - - | - - * - | <-- |control:u1|count14
LC48 -> * - * * - - * - - - - - - - - - | - - * - | <-- |control:u1|count13
LC47 -> * - * * * - * - - - - - - - - - | - - * - | <-- |control:u1|count12
LC46 -> * - * * * * * - - - - - - - - - | - - * - | <-- |control:u1|count11
LC45 -> * - * * * * * - - - - - - - - - | - - * - | <-- |control:u1|count10
LC33 -> - - - - - - - - * * - - - - - - | * * * - | <-- |shifter:u2|temp8
LC38 -> - - - - - - - - - * * - - - - - | * * * - | <-- |shifter:u2|temp7
LC42 -> - - - - - - - * - - * * - - - - | * - * - | <-- |shifter:u2|temp6
LC40 -> - - - - - - - * - - - * * - - - | - - * * | <-- |shifter:u2|temp5
LC37 -> - - - - - - - - - - - - * * - - | * * * - | <-- |shifter:u2|temp4
LC36 -> - - - - - - - - - - - - - * * - | * * * - | <-- |shifter:u2|temp3
LC35 -> - - - - - - - - - - - - - - * * | * * * - | <-- |shifter:u2|temp2
LC34 -> - - - - - - - - - - - - - - - * | * * * - | <-- |shifter:u2|temp1

Pin
5    -> - - - - - - - * - - - - - - - - | * - * - | <-- A0
14   -> * * * * * * * - - - - - - - - - | - * * * | <-- CS
8    -> * * * * * * * - - - - - - - - - | - * * * | <-- RD
9    -> * * * * * * * - - - - - - - - - | - * * * | <-- RESET
43   -> - - - - - - - - - - - - - - - - | - - - - | <-- RXC
11   -> * * * * * * * - * - - - - - - - | * - * * | <-- RXD
13   -> - - - - - - - * - - - - - - - - | * - * - | <-- TBE
12   -> * * * * * * * - - - - - - - - - | - * * * | <-- WR
LC18 -> - - - - - - - - * * * * * * * * | * - * - | <-- |control:u1|clk1
LC16 -> * * * * * * * * * * * * * * * * | * * * * | <-- RBF
LC12 -> - - - - - - - * - - - - - - - - | - - * - | <-- |shifter:u2|~799~1
LC2  -> - - - - - - - * - - - - - - - - | - - * - | <-- |shifter:u2|~875~1


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                              d:\zong\receiver.rpt
receiver

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'D':

                                         Logic cells placed in LAB 'D'
        +------------------------------- LC56 |control:u1|LPM_ADD_SUB:884|addcore:adder|addcore:adder0|result_node4
        | +----------------------------- LC58 |control:u1|LPM_ADD_SUB:884|addcore:adder|addcore:adder0|result_node5
        | | +--------------------------- LC60 |control:u1|LPM_ADD_SUB:941|addcore:adder|addcore:adder0|gcp2
        | | | +------------------------- LC50 |control:u1|LPM_ADD_SUB:941|addcore:adder|addcore:adder0|result_node4
        | | | | +----------------------- LC53 |control:u1|LPM_ADD_SUB:941|addcore:adder|addcore:adder0|result_node5
        | | | | | +--------------------- LC54 |control:u1|st
        | | | | | | +------------------- LC55 |control:u1|clk2
        | | | | | | | +----------------- LC63 |control:u1|count35
        | | | | | | | | +--------------- LC64 |control:u1|count34
        | | | | | | | | | +------------- LC57 |control:u1|count33
        | | | | | | | | | | +----------- LC59 |control:u1|count32
        | | | | | | | | | | | +--------- LC61 |control:u1|count31
        | | | | | | | | | | | | +------- LC62 |control:u1|count30
        | | | | | | | | | | | | | +----- LC51 FE
        | | | | | | | | | | | | | | +--- LC52 RX_buf7
        | | | | | | | | | | | | | | | +- LC49 SCLK
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'D'
LC      | | | | | | | | | | | | | | | | | A B C D |     Logic cells that feed LAB 'D':
LC56 -> - - - - - - - - * - - - - - - - | - - - * | <-- |control:u1|LPM_ADD_SUB:884|addcore:adder|addcore:adder0|result_node4
LC58 -> - - - - - - - * - - - - - - - - | - - - * | <-- |control:u1|LPM_ADD_SUB:884|addcore:adder|addcore:adder0|result_node5
LC60 -> - - - - - - - - - * - - - - - - | - - - * | <-- |control:u1|LPM_ADD_SUB:941|addcore:adder|addcore:adder0|gcp2
LC50 -> - - - - - - - - * - - - - - - - | - - - * | <-- |control:u1|LPM_ADD_SUB:941|addcore:adder|addcore:adder0|result_node4
LC53 -> - - - - - - - * - - - - - - - - | - - - * | <-- |control:u1|LPM_ADD_SUB:941|addcore:adder|addcore:adder0|result_node5
LC54 -> - - - - - * - - - - - - - - - - | - * - * | <-- |control:u1|st
LC55 -> - - - - - - * - - - - - - - - * | - - - * | <-- |control:u1|clk2
LC63 -> - * - - * - * * * * * * - - - - | - - - * | <-- |control:u1|count35
LC64 -> * * - * * - * * * * * * - - - - | - - - * | <-- |control:u1|count34
LC57 -> * * - * * - * * * * * * - - - - | - - - * | <-- |control:u1|count33
LC59 -> * * * * * - * * * * * * - - - - | - - - * | <-- |control:u1|count32
LC61 -> * * * * * - * * * * * * - - - - | - - - * | <-- |control:u1|count31
LC62 -> * * * * * - * * * * * * * - - - | - - - * | <-- |control:u1|count30

Pin
14   -> - - - - - * * * * * * * * - - - | - * * * | <-- CS
8    -> - - - - - * * * * * * * * - - - | - * * * | <-- RD
9    -> - - - - - * * * * * * * * - - - | - * * * | <-- RESET
43   -> - - - - - - - - - - - - - - - - | - - - - | <-- RXC
11   -> - - - - - * - - - - - - - * - - | * - * * | <-- RXD
12   -> - - - - - * * * * * * * * - - - | - * * * | <-- WR
LC39 -> - - - - - * * * * * * * * * - - | - - * * | <-- |control:u1|start
LC16 -> - - - - - - * - - - - - - * * * | * * * * | <-- RBF
LC40 -> - - - - - - - - - - - - - - * - | - - * * | <-- |shifter:u2|temp5


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                              d:\zong\receiver.rpt
receiver

** EQUATIONS **

A0       : INPUT;
CS       : INPUT;

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