hao1.rpt

本程序是用VHDL语言实现异步通信控制器

LC57 -> - - - - - - - - - - - - - - - * | - - - * - * - - | <-- |send:u2|temp8


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                  d:\zong\hao1.rpt
hao1

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'G':

                                         Logic cells placed in LAB 'G'
        +------------------------------- LC104 D0
        | +----------------------------- LC101 D1
        | | +--------------------------- LC99 D2
        | | | +------------------------- LC97 D4
        | | | | +----------------------- LC102 |receiver:u4|control:u1|start
        | | | | | +--------------------- LC100 |receiver:u4|control:u1|t
        | | | | | | +------------------- LC98 |receiver:u4|control:u1|st
        | | | | | | | +----------------- LC109 |receiver:u4|control:u1|count14
        | | | | | | | | +--------------- LC110 |receiver:u4|control:u1|count13
        | | | | | | | | | +------------- LC111 |receiver:u4|control:u1|count12
        | | | | | | | | | | +----------- LC106 |receiver:u4|control:u1|count11
        | | | | | | | | | | | +--------- LC107 |receiver:u4|control:u1|count10
        | | | | | | | | | | | | +------- LC103 |receiver:u4|shifter:u2|temp3
        | | | | | | | | | | | | | +----- LC108 |receiver:u4|shifter:u2|temp2
        | | | | | | | | | | | | | | +--- LC112 |receiver:u4|shifter:u2|temp1
        | | | | | | | | | | | | | | | +- LC105 |receiver:u4|shifter:u2|~733~1
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'G'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'G':
LC102-> - - - * * * * * * * * * * * * - | - - - - - - * * | <-- |receiver:u4|control:u1|start
LC100-> - - - - - * - - - - - - * * * - | - - - - - - * * | <-- |receiver:u4|control:u1|t
LC98 -> - - - - - - * - - - - - - - - - | - - - - * - * - | <-- |receiver:u4|control:u1|st
LC109-> - - - - * - - * * - - * - - - - | - - - - - - * - | <-- |receiver:u4|control:u1|count14
LC110-> - - - - * - - * * - - * - - - - | - - - - - - * - | <-- |receiver:u4|control:u1|count13
LC111-> - - - - * - - * * * - * - - - - | - - - - - - * - | <-- |receiver:u4|control:u1|count12
LC106-> - - - - * - - * * * * * - - - - | - - - - - - * - | <-- |receiver:u4|control:u1|count11
LC107-> - - - - * - - * * * * * - - - - | - - - - - - * - | <-- |receiver:u4|control:u1|count10
LC103-> - - * - - - - - - - - - * * - * | - - - - - - * - | <-- |receiver:u4|shifter:u2|temp3
LC108-> - * - - - - - - - - - - - * * * | - - - - - - * - | <-- |receiver:u4|shifter:u2|temp2
LC112-> * - - - - - - - - - - - - - * * | - - - - - - * - | <-- |receiver:u4|shifter:u2|temp1

Pin
17   -> * * * * - - - - - - - - - - - * | - - * * * * * * | <-- A0
4    -> * * * * * * * * * * * * - - - - | - * * * * * * * | <-- CS
18   -> * * * * * * * * * * * * - - - - | - * * * * * * * | <-- RD
6    -> - - - - * * * * * * * * - - - - | - - * * * * * - | <-- reset
83   -> - - - - - - - - - - - - - - - - | - - - - - - - - | <-- RXC
29   -> - - - * * * * * * * * * - - - - | - - - * - - * * | <-- RXD
2    -> - - - - - - - - - - - - - - - - | - - - - - - - - | <-- TXC
11   -> * * * * * * * * * * * * - - - - | - * * * * * * * | <-- WR
LC49 -> * * * * * * - * * * * * * * * - | - - - - - - * * | <-- |receiver:u4|control:u1|stop
LC65 -> - - - - - - - - - - - - * * * - | - - - * - - * * | <-- |receiver:u4|control:u1|clk1
LC113-> - - - * - - - - - - - - - - - * | - - - - - - * * | <-- |receiver:u4|shifter:u2|temp5
LC121-> - - - - - - - - - - - - * - - * | - - - - - - * * | <-- |receiver:u4|shifter:u2|temp4
LC84 -> - * - - - - - - - - - - - - - * | - - - - - * * * | <-- |send:u2|TBE


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                  d:\zong\hao1.rpt
hao1

** LOGIC CELL INTERCONNECTIONS **

Logic Array Block 'H':

                                         Logic cells placed in LAB 'H'
        +------------------------------- LC120 D3
        | +----------------------------- LC126 D5
        | | +--------------------------- LC118 D6
        | | | +------------------------- LC117 D7
        | | | | +----------------------- LC115 IRQ
        | | | | | +--------------------- LC125 |receiver:u4|shifter:u2|:17
        | | | | | | +------------------- LC122 |receiver:u4|shifter:u2|temp8
        | | | | | | | +----------------- LC119 |receiver:u4|shifter:u2|temp7
        | | | | | | | | +--------------- LC124 |receiver:u4|shifter:u2|temp6
        | | | | | | | | | +------------- LC113 |receiver:u4|shifter:u2|temp5
        | | | | | | | | | | +----------- LC121 |receiver:u4|shifter:u2|temp4
        | | | | | | | | | | | +--------- LC114 |receiver:u4|shifter:u2|~667~1
        | | | | | | | | | | | | +------- LC116 |receiver:u4|shifter:u2|~738~1
        | | | | | | | | | | | | | +----- LC123 |receiver:u4|shifter:u2|~738~2
        | | | | | | | | | | | | | | +--- LC128 |receiver:u4|shifter:u2|~738~3
        | | | | | | | | | | | | | | | +- LC127 |receiver:u4|shifter:u2|~738~4
        | | | | | | | | | | | | | | | | 
        | | | | | | | | | | | | | | | |   Other LABs fed by signals
        | | | | | | | | | | | | | | | |   that feed LAB 'H'
LC      | | | | | | | | | | | | | | | | | A B C D E F G H |     Logic cells that feed LAB 'H':
LC125-> * - - - * - - - - - - - - - - - | - - - - - - - * | <-- |receiver:u4|shifter:u2|:17
LC122-> - - - * - - * * - - - - * * * - | - - - - - - - * | <-- |receiver:u4|shifter:u2|temp8
LC119-> - - * - - - - * * - - * * * * * | - - - - - - - * | <-- |receiver:u4|shifter:u2|temp7
LC124-> - * - - - - - - * * - - * * * * | - - - - - - - * | <-- |receiver:u4|shifter:u2|temp6
LC113-> - - - - - - - - - * * - - - - - | - - - - - - * * | <-- |receiver:u4|shifter:u2|temp5
LC121-> * - - - - - - - - - * - - - - - | - - - - - - * * | <-- |receiver:u4|shifter:u2|temp4
LC114-> - - - - - - - - - - - - - * * * | - - - - - - - * | <-- |receiver:u4|shifter:u2|~667~1
LC116-> - - - - * - - - - - - - - - - - | - - - - - - - * | <-- |receiver:u4|shifter:u2|~738~1
LC123-> - - - - - - - - - - - - * - - - | - - - - - - - * | <-- |receiver:u4|shifter:u2|~738~2
LC128-> - - - - - - - - - - - - * - - - | - - - - - - - * | <-- |receiver:u4|shifter:u2|~738~3
LC127-> - - - - - - - - - - - - * - - - | - - - - - - - * | <-- |receiver:u4|shifter:u2|~738~4

Pin
17   -> * * * * * * - - - - - * * * * * | - - * * * * * * | <-- A0
4    -> * * * * - - - - - - - - - - - - | - * * * * * * * | <-- CS
18   -> * * * * - - - - - - - - - - - - | - * * * * * * * | <-- RD
83   -> - - - - - - - - - - - - - - - - | - - - - - - - - | <-- RXC
29   -> - - - - - - * - - - - - - - - - | - - - * - - * * | <-- RXD
2    -> - - - - - - - - - - - - - - - - | - - - - - - - - | <-- TXC
11   -> * * * * - - - - - - - - - - - - | - * * * * * * * | <-- WR
LC102-> - - - - - - * * * * * - - - - - | - - - - - - * * | <-- |receiver:u4|control:u1|start
LC100-> - - - - - - * * * * * - - - - - | - - - - - - * * | <-- |receiver:u4|control:u1|t
LC49 -> * * * * * * * * * * * - - - - - | - - - - - - * * | <-- |receiver:u4|control:u1|stop
LC65 -> - - - - - - * * * * * - - - - - | - - - * - - * * | <-- |receiver:u4|control:u1|clk1
LC87 -> - - - - - - - - - - - - - - - * | - - - - - - - * | <-- |receiver:u4|shifter:u2|~658~1
LC92 -> - - - - - - - - - - - - * * * * | - - - - - - - * | <-- |receiver:u4|shifter:u2|~659~1
LC105-> - - - - - - - - - - - - * * * * | - - - - - - - * | <-- |receiver:u4|shifter:u2|~733~1
LC80 -> - - - - * - - - - - - - - - - - | - - - - - - - * | <-- |reg:u3|ERXE
LC96 -> - - - - * - - - - - - - - - - - | - - - - - - - * | <-- |reg:u3|ETBE
LC95 -> - - - - * - - - - - - - - - - - | - - - - - - - * | <-- |reg:u3|ERBF
LC84 -> - - - - * - - - - - - * * * * * | - - - - - * * * | <-- |send:u2|TBE


* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).


Device-Specific Information:                                  d:\zong\hao1.rpt
hao1

** EQUATIONS **

A0       : INPUT;
CS       : INPUT;
RD       : INPUT;
reset    : INPUT;
RXC      : INPUT;
RXD      : INPUT;
TXC      : INPUT;
WR       : INPUT;

-- Node name is 'D0' 
-- Equation name is 'D0', location is LC104, type is bidir.
D0       = TRI(_LC104,  _LC083);
_LC104   = LCELL( _EQ001 $  GND);
  _EQ001 = !A0 & !CS &  _LC049 &  _LC112 & !RD &  WR
         #  A0 & !CS &  _LC049 & !RD &  WR;

-- Node name is 'D1' 
-- Equation name is 'D1', location is LC101, type is bidir.
D1       = TRI(_LC101,  _LC083);
_LC101   = LCELL( _EQ002 $  GND);
  _EQ002 = !A0 & !CS &  _LC049 &  _LC108 & !RD &  WR
         #  A0 & !CS &  _LC084 & !RD &  WR;

-- Node name is 'D2' 
-- Equation name is 'D2', location is LC099, type is bidir.
D2       = TRI(_LC099,  _LC083);
_LC099   = LCELL( _EQ003 $  GND);
  _EQ003 = !A0 & !CS &  _LC049 &  _LC103 & !RD &  WR;

-- Node name is 'D3' 
-- Equation name is 'D3', location is LC120, type is bidir.
D3       = TRI(_LC120,  _LC083);
_LC120   = LCELL( _EQ004 $  GND);
  _EQ004 = !A0 & !CS &  _LC049 &  _LC121 & !RD &  WR
         #  A0 & !CS &  _LC125 & !RD &  WR;

-- Node name is 'D4' 
-- Equation name is 'D4', location is LC097, type is bidir.
D4       = TRI(_LC097,  _LC083);
_LC097   = LCELL( _EQ005 $  GND);
  _EQ005 =  A0 & !CS &  _LC049 &  _LC102 & !RD & !RXD &  WR
         # !A0 & !CS &  _LC049 &  _LC113 & !RD &  WR;

-- Node name is 'D5' 
-- Equation name is 'D5', location is LC126, type is bidir.
D5       = TRI(_LC126,  _LC083);
_LC126   = LCELL( _EQ006 $  GND);
  _EQ006 = !A0 & !CS &  _LC049 &  _LC124 & !RD &  WR;

-- Node name is 'D6' 
-- Equation name is 'D6', location is LC118, type is bidir.
D6       = TRI(_LC118,  _LC083);
_LC118   = LCELL( _EQ007 $  GND);
  _EQ007 = !A0 & !CS &  _LC049 &  _LC119 & !RD &  WR;

-- Node name is 'D7~1' 
-- Equation name is 'D7~1', location is LC083, type is buried.
-- synthesized logic cell 
_LC083   = LCELL( _EQ008 $  GND);
  _EQ008 = !CS & !RD &  WR;

-- Node name is 'D7' 
-- Equation name is 'D7', location is LC117, type is bidir.
D7       = TRI(_LC117,  _LC083);
_LC117   = LCELL( _EQ009 $  GND);
  _EQ009 = !A0 & !CS &  _LC049 &  _LC122 & !RD &  WR;

-- Node name is 'IRQ' 
-- Equation name is 'IRQ', location is LC115, type is output.
 IRQ     = LCELL( _EQ010 $  GND);
  _EQ010 = !A0 &  _LC049 &  _LC080 &  _LC116
         #  _LC080 &  _LC125
         #  _LC084 &  _LC096
         #  _LC049 &  _LC095;

-- Node name is 'TXD' = '|send:u2|temp9' 
-- Equation name is 'TXD', type is output 
 TXD     = DFFE( _EQ011 $  _LC057,  _LC056,  VCC, !_EQ012,  VCC);
  _EQ011 =  _LC041 & !_LC044 & !_LC057 &  _LC081 & !_LC082
         # !_LC041 & !_LC044 &  _LC057 & !_LC081 & !_LC082;
  _EQ012 =  _X001;
  _X001  = EXP(!A0 & !CS &  RD &  reset & !WR);

-- Node name is '|receiver:u4|control:u1|:27' = '|receiver:u4|control:u1|clk1' 
-- Equation name is '_LC065', type is buried 
_LC065   = TFFE( _EQ013, GLOBAL( RXC),  VCC,  VCC,  VCC);
  _EQ013 = !CS &  _LC068 & !_LC069 &  _LC070 &  _LC071 & !_LC073 &  _LC098 & 
             !RD &  reset &  WR;

-- Node name is '|receiver:u4|control:u1|:20' = '|receiver:u4|control:u1|count10' 
-- Equation name is '_LC107', type is buried 
_LC107   = TFFE( _EQ014, GLOBAL( RXC),  VCC,  VCC,  VCC);