shifter.vhd

本程序是用VHDL语言实现异步通信控制器

LIBRARY ieee; 
USE ieee.std_logic_1164.all;
USE ieee.std_logic_unsigned.all;
entity shifter is
	port(A0:in std_logic;
		 RXD,LDRB,LDSR,RXEN,TBE:in std_logic;
		 RX_buf:out std_logic_vector(7 downto 0);
		 PE,RBF,OVERFLOW:out std_logic);
end;
architecture action of shifter is
signal temp:std_logic_vector(8 downto 0);
signal cp,data,t:std_logic_vector(7 downto 0);
signal R:std_logic;
begin
p1:process(RXEN)
  begin
	if(RXEN'event and RXEN='1')then
		if(LDRB='0')then
			if(LDSR='1')then
				temp<="111111111";
			else
				if (temp(0)='1' and LDSR='1') then
					temp<=RXD&"10000000";
				else temp<=RXD&temp(8 downto 1);
			end if;end if;end if;end if;
end process p1;
data<=temp(8 downto 1) when (LDRB='1')ELSE "00000000";--(7)& temp(6)& temp(5)& temp(4)& temp(3)& temp(2)& temp(1)& temp(0)
cp<=temp(8 downto 1) when (TBE='1' and A0='0')--(7)& temp(6)& temp(5)& temp(4)& temp(3)& temp(2)& temp(1)& temp(0)
    else"10000000";
PE<='1'when (cp(7)=(cp(0)Xor cp(1)Xor cp(2)Xor cp(3)Xor cp(4)Xor cp(5)Xor cp(6)))and (LDRB='1' and A0='0')
	   else '0';
R<=LDRB;
RBF<=LDRB;
PROCESS(ldrb)
  begin
	if(LDRB'EVENT AND LDRB='1')THEN
		IF(R='1'AND A0='1')THEN	OVERFLOW<='1';
		ELSE OVERFLOW<='0';
	END IF;END IF;
END PROCESS;	
--process(LDRB)
 -- begin
	--if(LDRB'EVENT AND LDRB='1')THEN
		--IF A0='0' then t<=data;
	--end if;end if;
--end process;
RX_buf<=data;-- when (LDRB='1') else "00000000";--t
end;