📄 communication.rpt
字号:
s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
! = NOT gate push-back
r = Fitter-inserted logic cell
G = Global Source. Fan-out destinations counted here do not include destinations
that are driven using global routing resources. Refer to the Auto Global Signals,
Clock Signals, Clear Signals, Synchronous Load Signals, and Synchronous Clear Signals
Sections of this Report File for information on which signals' fan-outs are used as
Clock, Clear, Preset, Output Enable, and synchronous Load signals.
Device-Specific Information:c:\documents and settings\focuson\desktop\zong\communication.rpt
communication
** OUTPUTS **
Shareable
Expanders Fan-In Fan-Out
Pin LC LAB Primitive Code Total Shared n/a INP FBK OUT FBK Name
27 43 C TRI t 0 0 0 0 4 0 1 D0
28 41 C TRI t 0 0 0 0 4 0 1 D1
47 67 E TRI t 0 0 0 0 4 0 1 D2
46 65 E TRI t 0 0 0 0 4 0 1 D3
30 37 C TRI t 0 0 0 0 4 0 1 D4
32 35 C TRI t 0 0 0 0 4 0 1 D5
33 33 C TRI t 0 0 0 0 4 0 1 D6
29 40 C TRI t 0 0 0 0 4 0 1 D7
13 1 A OUTPUT t 1 0 0 0 3 0 0 ~PIN002
37 51 D FF t 2 1 1 1 8 0 0 TXD (|send:u1|:24)
Code:
s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
! = NOT gate push-back
r = Fitter-inserted logic cell
Device-Specific Information:c:\documents and settings\focuson\desktop\zong\communication.rpt
communication
** BURIED LOGIC **
Shareable
Expanders Fan-In Fan-Out
Pin LC LAB Primitive Code Total Shared n/a INP FBK OUT FBK Name
(65) 96 F SOFT t 0 0 0 0 4 0 1 |receiver:u2|control:u1|LPM_ADD_SUB:652|addcore:adder|addcore:adder0|result_node3
(49) 69 E SOFT t 0 0 0 0 2 0 1 |receiver:u2|control:u1|LPM_ADD_SUB:1377|addcore:adder|addcore:adder0|result_node1
- 70 E SOFT t 0 0 0 0 4 0 1 |receiver:u2|control:u1|LPM_ADD_SUB:1377|addcore:adder|addcore:adder0|result_node3
- 66 E TFFE + t 0 0 0 2 7 0 16 |receiver:u2|control:u1|start (|receiver:u2|control:u1|:9)
(59) 86 F TFFE + t 0 0 0 2 3 0 9 |receiver:u2|control:u1|t (|receiver:u2|control:u1|:10)
(64) 94 F TFFE + t 0 0 0 2 2 0 7 |receiver:u2|control:u1|st (|receiver:u2|control:u1|:11)
- 71 E TFFE + t 1 0 0 2 7 0 4 |receiver:u2|control:u1|count14 (|receiver:u2|control:u1|:12)
- 76 E TFFE + t 1 0 0 2 7 0 4 |receiver:u2|control:u1|count13 (|receiver:u2|control:u1|:13)
- 78 E TFFE + t 0 0 0 2 5 0 5 |receiver:u2|control:u1|count12 (|receiver:u2|control:u1|:14)
(52) 75 E TFFE + t 0 0 0 2 4 0 6 |receiver:u2|control:u1|count11 (|receiver:u2|control:u1|:15)
- 74 E TFFE + t 1 0 0 2 7 0 6 |receiver:u2|control:u1|count10 (|receiver:u2|control:u1|:16)
- 79 E DFFE t 0 0 0 0 5 9 15 |receiver:u2|control:u1|stop (|receiver:u2|control:u1|:17)
- 83 F TFFE + t 0 0 0 1 6 0 6 |receiver:u2|control:u1|count24 (|receiver:u2|control:u1|:18)
(57) 84 F DFFE + t 1 0 1 1 7 0 7 |receiver:u2|control:u1|count23 (|receiver:u2|control:u1|:19)
(60) 88 F TFFE + t 0 0 0 1 6 0 7 |receiver:u2|control:u1|count22 (|receiver:u2|control:u1|:20)
- 90 F TFFE + t 0 0 0 1 6 0 7 |receiver:u2|control:u1|count21 (|receiver:u2|control:u1|:21)
- 91 F DFFE + t 1 0 1 1 6 0 7 |receiver:u2|control:u1|count20 (|receiver:u2|control:u1|:22)
- 85 F TFFE + t 0 0 0 1 6 0 13 |receiver:u2|control:u1|clk1 (|receiver:u2|control:u1|:23)
- 68 E DFFE t 0 0 0 1 6 0 5 |receiver:u2|control:u1|count43 (|receiver:u2|control:u1|:31)
(51) 73 E TFFE t 0 0 0 0 3 0 5 |receiver:u2|control:u1|count42 (|receiver:u2|control:u1|:32)
(50) 72 E DFFE t 0 0 0 0 6 0 7 |receiver:u2|control:u1|count41 (|receiver:u2|control:u1|:33)
(54) 77 E TFFE t 0 0 0 1 5 0 7 |receiver:u2|control:u1|count40 (|receiver:u2|control:u1|:34)
- 82 F DFFE t 0 0 0 1 5 1 2 |receiver:u2|shifter:u2|temp8 (|receiver:u2|shifter:u2|:16)
(56) 81 F DFFE t 0 0 0 0 6 1 2 |receiver:u2|shifter:u2|temp7 (|receiver:u2|shifter:u2|:17)
- 95 F DFFE t 0 0 0 0 6 1 2 |receiver:u2|shifter:u2|temp6 (|receiver:u2|shifter:u2|:18)
- 87 F DFFE t 0 0 0 0 6 1 2 |receiver:u2|shifter:u2|temp5 (|receiver:u2|shifter:u2|:19)
(61) 89 F DFFE t 0 0 0 0 6 1 2 |receiver:u2|shifter:u2|temp4 (|receiver:u2|shifter:u2|:20)
(62) 92 F DFFE t 0 0 0 0 6 1 2 |receiver:u2|shifter:u2|temp3 (|receiver:u2|shifter:u2|:21)
- 93 F DFFE t 0 0 0 0 6 1 2 |receiver:u2|shifter:u2|temp2 (|receiver:u2|shifter:u2|:22)
(55) 80 E DFFE t 0 0 0 0 6 1 1 |receiver:u2|shifter:u2|temp1 (|receiver:u2|shifter:u2|:23)
(45) 64 D SOFT t 0 0 0 0 2 0 1 |send:u1|LPM_ADD_SUB:341|addcore:adder|addcore:adder0|result_node1
(44) 61 D SOFT t 0 0 0 0 4 0 1 |send:u1|LPM_ADD_SUB:341|addcore:adder|addcore:adder0|result_node3
(41) 57 D TFFE t 0 0 0 2 7 0 6 |send:u1|count24 (|send:u1|:14)
- 50 D TFFE t 1 0 0 2 7 0 6 |send:u1|count23 (|send:u1|:15)
- 62 D TFFE t 0 0 0 2 7 0 6 |send:u1|count22 (|send:u1|:16)
- 55 D TFFE t 0 0 0 2 7 0 6 |send:u1|count21 (|send:u1|:17)
(42) 59 D TFFE t 1 0 0 2 7 0 6 |send:u1|count20 (|send:u1|:18)
- 60 D TFFE t 0 0 0 2 7 1 13 |send:u1|clk (|send:u1|:19)
- 2 A DFFE t 1 1 0 1 8 1 15 |send:u1|count13 (|send:u1|:20)
(36) 49 D TFFE t 1 1 0 1 5 1 15 |send:u1|count12 (|send:u1|:21)
- 3 A DFFE t 1 1 0 1 8 1 17 |send:u1|count11 (|send:u1|:22)
- 52 D TFFE t 1 1 0 1 3 1 17 |send:u1|count10 (|send:u1|:23)
(39) 53 D DFFE t 8 0 1 1 10 1 1 |send:u1|temp8 (|send:u1|:25)
- 13 A DFFE t 8 0 1 1 10 0 2 |send:u1|temp7 (|send:u1|:26)
(18) 25 B DFFE t 8 0 1 1 10 0 2 |send:u1|temp6 (|send:u1|:27)
- 26 B DFFE t 8 0 1 1 10 0 2 |send:u1|temp5 (|send:u1|:28)
- 44 C DFFE t 8 0 1 1 10 0 2 |send:u1|temp4 (|send:u1|:29)
- 34 C DFFE t 3 0 1 1 11 0 3 |send:u1|temp3 (|send:u1|:30)
- 46 C DFFE t 3 0 1 1 11 0 4 |send:u1|temp2 (|send:u1|:31)
- 63 D DFFE t 3 0 1 1 11 0 4 |send:u1|temp1 (|send:u1|:32)
- 58 D TFFE t 0 0 0 1 8 0 3 |send:u1|temp0 (|send:u1|:33)
- 42 C SOFT s t 1 0 1 1 8 0 1 |send:u1|~1017~1
- 39 C SOFT s t 1 0 1 1 8 0 1 |send:u1|~1023~1
- 54 D SOFT s t 1 0 1 1 8 0 1 |send:u1|~1029~1
(40) 56 D LCELL s t 0 0 0 1 2 10 24 ~174~1
- 5 A LCELL s t 1 0 1 4 2 10 24 ~175~1
Code:
s = Synthesized pin or logic cell
t = Turbo logic cell
+ = Synchronous flipflop
! = NOT gate push-back
r = Fitter-inserted logic cell
Device-Specific Information:c:\documents and settings\focuson\desktop\zong\communication.rpt
communication
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'A':
Logic cells placed in LAB 'A'
+--------- LC1 ~PIN002
| +------- LC2 |send:u1|count13
| | +----- LC3 |send:u1|count11
| | | +--- LC13 |send:u1|temp7
| | | | +- LC5 ~175~1
| | | | |
| | | | | Other LABs fed by signals
| | | | | that feed LAB 'A'
LC | | | | | | A B C D E F | Logic cells that feed LAB 'A':
LC2 -> - * * * - | * * * * - - | <-- |send:u1|count13
LC3 -> - * * * - | * * * * - - | <-- |send:u1|count11
LC13 -> - - - * - | * - - * - - | <-- |send:u1|temp7
LC5 -> * * * * * | * * * * * - | <-- ~175~1
Pin
7 -> - - - - * | * - - - - - | <-- CS
68 -> - - - - - | - - - - - - | <-- ~PIN001
8 -> - - - - * | * - - - - - | <-- RD
12 -> - * * * * | * * * * * * | <-- reset
67 -> - - - - - | - - - - - - | <-- RXC
23 -> - - - - * | * - - - - - | <-- WR
LC67 -> - - - * - | * - - - - - | <-- D2
LC79 -> * - - - - | * - * - * * | <-- |receiver:u2|control:u1|stop
LC64 -> - - * - - | * - - - - - | <-- |send:u1|LPM_ADD_SUB:341|addcore:adder|addcore:adder0|result_node1
LC61 -> - * - - - | * - - - - - | <-- |send:u1|LPM_ADD_SUB:341|addcore:adder|addcore:adder0|result_node3
LC60 -> - * * * - | * * * * - - | <-- |send:u1|clk
LC49 -> - * * * - | * * * * - - | <-- |send:u1|count12
LC52 -> - * * * - | * * * * - - | <-- |send:u1|count10
LC25 -> - - - * - | * * - - - - | <-- |send:u1|temp6
LC56 -> * * * * * | * * * * * - | <-- ~174~1
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information:c:\documents and settings\focuson\desktop\zong\communication.rpt
communication
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'B':
Logic cells placed in LAB 'B'
+--- LC25 |send:u1|temp6
| +- LC26 |send:u1|temp5
| |
| | Other LABs fed by signals
| | that feed LAB 'B'
LC | | | A B C D E F | Logic cells that feed LAB 'B':
LC25 -> * - | * * - - - - | <-- |send:u1|temp6
LC26 -> * * | - * - - - - | <-- |send:u1|temp5
Pin
68 -> - - | - - - - - - | <-- ~PIN001
12 -> * * | * * * * * * | <-- reset
67 -> - - | - - - - - - | <-- RXC
LC43 -> - * | - * - - - - | <-- D0
LC41 -> * - | - * - - - - | <-- D1
LC60 -> * * | * * * * - - | <-- |send:u1|clk
LC2 -> * * | * * * * - - | <-- |send:u1|count13
LC49 -> * * | * * * * - - | <-- |send:u1|count12
LC3 -> * * | * * * * - - | <-- |send:u1|count11
LC52 -> * * | * * * * - - | <-- |send:u1|count10
LC44 -> - * | - * * - - - | <-- |send:u1|temp4
LC56 -> * * | * * * * * - | <-- ~174~1
LC5 -> * * | * * * * * - | <-- ~175~1
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
Device-Specific Information:c:\documents and settings\focuson\desktop\zong\communication.rpt
communication
** LOGIC CELL INTERCONNECTIONS **
Logic Array Block 'C':
Logic cells placed in LAB 'C'
+--------------------- LC43 D0
| +------------------- LC41 D1
| | +----------------- LC37 D4
| | | +--------------- LC35 D5
| | | | +------------- LC33 D6
| | | | | +----------- LC40 D7
| | | | | | +--------- LC44 |send:u1|temp4
| | | | | | | +------- LC34 |send:u1|temp3
| | | | | | | | +----- LC46 |send:u1|temp2
| | | | | | | | | +--- LC42 |send:u1|~1017~1
| | | | | | | | | | +- LC39 |send:u1|~1023~1
| | | | | | | | | | |
| | | | | | | | | | | Other LABs fed by signals
| | | | | | | | | | | that feed LAB 'C'
LC | | | | | | | | | | | | A B C D E F | Logic cells that feed LAB 'C':
LC35 -> - - - - - - - - * - - | - - * - - - | <-- D5
LC33 -> - - - - - - - * - - - | - - * - - - | <-- D6
LC40 -> - - - - - - * - - - - | - - * - - - | <-- D7
LC44 -> - - - - - - * - - - - | - * * - - - | <-- |send:u1|temp4
LC34 -> - - - - - - * * - * - | - - * - - - | <-- |send:u1|temp3
LC46 -> - - - - - - - * * * * | - - * - - - | <-- |send:u1|temp2
LC42 -> - - - - - - - * - - - | - - * - - - | <-- |send:u1|~1017~1
LC39 -> - - - - - - - - * - - | - - * - - - | <-- |send:u1|~1023~1
Pin
68 -> - - - - - - - - - - - | - - - - - - | <-- ~PIN001
12 -> - - - - - - * * * * * | * * * * * * | <-- reset
67 -> - - - - - - - - - - - | - - - - - - | <-- RXC
LC79 -> * * * * * * - - - - - | * - * - * * | <-- |receiver:u2|control:u1|stop
LC82 -> - - * - - - - - - - - | - - * - - * | <-- |receiver:u2|shifter:u2|temp8
LC81 -> - - - * - - - - - - - | - - * - - * | <-- |receiver:u2|shifter:u2|temp7
LC95 -> - - - - * - - - - - - | - - * - - * | <-- |receiver:u2|shifter:u2|temp6
LC87 -> - - - - - * - - - - - | - - * - - * | <-- |receiver:u2|shifter:u2|temp5
LC89 -> * - - - - - - - - - - | - - * - - * | <-- |receiver:u2|shifter:u2|temp4
LC92 -> - * - - - - - - - - - | - - * - - * | <-- |receiver:u2|shifter:u2|temp3
LC60 -> - - - - - - * * * - - | * * * * - - | <-- |send:u1|clk
LC2 -> - - - - - - * * * * * | * * * * - - | <-- |send:u1|count13
LC49 -> - - - - - - * * * * * | * * * * - - | <-- |send:u1|count12
LC3 -> - - - - - - * * * * * | * * * * - - | <-- |send:u1|count11
LC52 -> - - - - - - * * * * * | * * * * - - | <-- |send:u1|count10
LC63 -> - - - - - - - - * - * | - - * * - - | <-- |send:u1|temp1
LC56 -> * * * * * * * * * * * | * * * * * - | <-- ~174~1
LC5 -> * * * * * * * * * * * | * * * * * - | <-- ~175~1
* = The logic cell or pin is an input to the logic cell (or LAB) through the PIA.
- = The logic cell or pin is not an input to the logic cell (or LAB).
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